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| author | Alex Deucher <alexander.deucher@amd.com> | 2013-10-10 19:47:01 +0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2013-10-10 19:47:01 +0400 |
| commit | b852c985010a77c850b7548d64bbb964ca462b02 (patch) | |
| tree | e08b904291c6c242a6e264286330b9376a4a2789 | |
| parent | 4076a65544e2de310cbf4eaadb13ee15bbfaaf4f (diff) | |
| download | linux-b852c985010a77c850b7548d64bbb964ca462b02.tar.xz | |
drm/radeon: re-enable sw ACR support on pre-DCE4
HW ACR support may have issues on some older chips, so
use SW ACR for now until we've tested further.
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
CC: Rafał Miłecki <zajec5@gmail.com>
| -rw-r--r-- | drivers/gpu/drm/radeon/r600_hdmi.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c index e2ae1c237fb4..5b729319f27b 100644 --- a/drivers/gpu/drm/radeon/r600_hdmi.c +++ b/drivers/gpu/drm/radeon/r600_hdmi.c @@ -451,6 +451,7 @@ void r600_hdmi_setmode(struct drm_encoder *encoder, struct drm_display_mode *mod } WREG32(HDMI0_ACR_PACKET_CONTROL + offset, + HDMI0_ACR_SOURCE | /* select SW CTS value - XXX verify that hw CTS works on all families */ HDMI0_ACR_AUTO_SEND); /* allow hw to sent ACR packets when required */ WREG32(HDMI0_VBI_PACKET_CONTROL + offset, |