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| author | Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> | 2019-06-05 08:04:00 +0300 |
|---|---|---|
| committer | Wim Van Sebroeck <wim@linux-watchdog.org> | 2019-07-08 20:39:44 +0300 |
| commit | b836005b4f95cccdc1f53849a31cac2dc375f4b7 (patch) | |
| tree | 38382bf14eb80c8fb4de63faf13e7a6fc1ff5bb0 | |
| parent | 1a4aaf9f11f9937e93fe9907e6c2320a10a9f269 (diff) | |
| download | linux-b836005b4f95cccdc1f53849a31cac2dc375f4b7.tar.xz | |
watchdog: renesas_wdt: Add a few cycles delay
According to the hardware manual of R-Car Gen2 and Gen3,
software should wait a few RLCK cycles as following:
- Delay 2 cycles before setting watchdog counter.
- Delay 3 cycles before disabling module clock.
So, this patch adds such delays.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Simon Horman <horms+renesas@verge.net.au>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
| -rw-r--r-- | drivers/watchdog/renesas_wdt.c | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/drivers/watchdog/renesas_wdt.c b/drivers/watchdog/renesas_wdt.c index d8ac2299400b..00662a8e039c 100644 --- a/drivers/watchdog/renesas_wdt.c +++ b/drivers/watchdog/renesas_wdt.c @@ -7,6 +7,7 @@ */ #include <linux/bitops.h> #include <linux/clk.h> +#include <linux/delay.h> #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> @@ -70,6 +71,15 @@ static int rwdt_init_timeout(struct watchdog_device *wdev) return 0; } +static void rwdt_wait_cycles(struct rwdt_priv *priv, unsigned int cycles) +{ + unsigned int delay; + + delay = DIV_ROUND_UP(cycles * 1000000, priv->clk_rate); + + usleep_range(delay, 2 * delay); +} + static int rwdt_start(struct watchdog_device *wdev) { struct rwdt_priv *priv = watchdog_get_drvdata(wdev); @@ -80,6 +90,8 @@ static int rwdt_start(struct watchdog_device *wdev) /* Stop the timer before we modify any register */ val = readb_relaxed(priv->base + RWTCSRA) & ~RWTCSRA_TME; rwdt_write(priv, val, RWTCSRA); + /* Delay 2 cycles before setting watchdog counter */ + rwdt_wait_cycles(priv, 2); rwdt_init_timeout(wdev); rwdt_write(priv, priv->cks, RWTCSRA); @@ -98,6 +110,8 @@ static int rwdt_stop(struct watchdog_device *wdev) struct rwdt_priv *priv = watchdog_get_drvdata(wdev); rwdt_write(priv, priv->cks, RWTCSRA); + /* Delay 3 cycles before disabling module clock */ + rwdt_wait_cycles(priv, 3); pm_runtime_put(wdev->parent); return 0; |