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author | Miquel Raynal <miquel.raynal@free-electrons.com> | 2018-01-09 13:36:31 +0300 |
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committer | Boris Brezillon <boris.brezillon@free-electrons.com> | 2018-01-12 17:10:08 +0300 |
commit | b76bb4e64e7514a9d9027e2b0d0b76ee84a4d27b (patch) | |
tree | e1b05b803bc469c3a2e172573d07f471f3d44bd2 | |
parent | 87e89ce8d0d14f573c068c61bec2117751fb5103 (diff) | |
download | linux-b76bb4e64e7514a9d9027e2b0d0b76ee84a4d27b.tar.xz |
dt-bindings: mtd: document new nand-rb property
There are already an atmel,rb and an allwinner,rb properties, let's not
make other ones and instead use a generic term: nand-rb to define NAND
chips Ready/Busy lines.
Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
-rw-r--r-- | Documentation/devicetree/bindings/mtd/nand.txt | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/mtd/nand.txt b/Documentation/devicetree/bindings/mtd/nand.txt index 133f3813719c..8bb11d809429 100644 --- a/Documentation/devicetree/bindings/mtd/nand.txt +++ b/Documentation/devicetree/bindings/mtd/nand.txt @@ -43,6 +43,7 @@ Optional NAND chip properties: This is particularly useful when only the in-band area is used by the upper layers, and you want to make your NAND as reliable as possible. +- nand-rb: shall contain the native Ready/Busy ids. The ECC strength and ECC step size properties define the correction capability of a controller. Together, they say a controller can correct "{strength} bit |