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| author | Emil Renner Berthing <kernel@esmil.dk> | 2021-10-31 19:15:58 +0300 |
|---|---|---|
| committer | Emil Renner Berthing <emil.renner.berthing@canonical.com> | 2024-07-22 02:20:57 +0300 |
| commit | a93c46c7a1b5027b809dcb0a4223ac3466d04594 (patch) | |
| tree | 6b43f2dcffba92788635deb076e037335bffb451 | |
| parent | 0c3836482481200ead7b416ca80c68a29cfdaabd (diff) | |
| download | linux-a93c46c7a1b5027b809dcb0a4223ac3466d04594.tar.xz | |
riscv: dts: starfive: Add JH7100 high speed UARTs
Add missing device tree nodes for UART0 and UART1 on the StarFive JH7100
SoC. UART0 is used for Bluetooth on the BeagleV Starlight and StarFive
VisionFive V1 boards.
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
| -rw-r--r-- | arch/riscv/boot/dts/starfive/jh7100.dtsi | 26 |
1 files changed, 26 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index 7de0732b8eab..aecb73d25aa7 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -258,6 +258,32 @@ reg = <0x0 0x11850000 0x0 0x10000>; }; + uart0: serial@11870000 { + compatible = "starfive,jh7100-hsuart", "snps,dw-apb-uart"; + reg = <0x0 0x11870000 0x0 0x10000>; + clocks = <&clkgen JH7100_CLK_UART0_CORE>, + <&clkgen JH7100_CLK_UART0_APB>; + clock-names = "baudclk", "apb_pclk"; + resets = <&rstgen JH7100_RSTN_UART0_APB>; + interrupts = <92>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + + uart1: serial@11880000 { + compatible = "starfive,jh7100-hsuart", "snps,dw-apb-uart"; + reg = <0x0 0x11880000 0x0 0x10000>; + clocks = <&clkgen JH7100_CLK_UART1_CORE>, + <&clkgen JH7100_CLK_UART1_APB>; + clock-names = "baudclk", "apb_pclk"; + resets = <&rstgen JH7100_RSTN_UART1_APB>; + interrupts = <93>; + reg-io-width = <4>; + reg-shift = <2>; + status = "disabled"; + }; + i2c0: i2c@118b0000 { compatible = "snps,designware-i2c"; reg = <0x0 0x118b0000 0x0 0x10000>; |