diff options
| author | Andre Przywara <andre.przywara@arm.com> | 2022-03-17 19:23:44 +0300 |
|---|---|---|
| committer | Jernej Skrabec <jernej.skrabec@gmail.com> | 2022-04-06 23:26:50 +0300 |
| commit | a26123f355f23d8ba980d7ecf4899d309d5cd708 (patch) | |
| tree | 4c9dea86cd8af825a294436838885e20894a490b | |
| parent | a6d9efb62a482c2da1078d9654b68a0777aa2fc6 (diff) | |
| download | linux-a26123f355f23d8ba980d7ecf4899d309d5cd708.tar.xz | |
ARM: dts: suniv: F1C100: fix timer node
The Allwinner F1C100s has three timer instances, each with their own
interrupt line.
Add the missing two interrupts to the DT node, to match the DT binding.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://lore.kernel.org/r/20220317162349.739636-8-andre.przywara@arm.com
| -rw-r--r-- | arch/arm/boot/dts/suniv-f1c100s.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/suniv-f1c100s.dtsi b/arch/arm/boot/dts/suniv-f1c100s.dtsi index 0a7fa37bbd24..f455e276521e 100644 --- a/arch/arm/boot/dts/suniv-f1c100s.dtsi +++ b/arch/arm/boot/dts/suniv-f1c100s.dtsi @@ -105,7 +105,7 @@ timer@1c20c00 { compatible = "allwinner,suniv-f1c100s-timer"; reg = <0x01c20c00 0x90>; - interrupts = <13>; + interrupts = <13>, <14>, <15>; clocks = <&osc24M>; }; |