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| author | Anson Huang <Anson.Huang@nxp.com> | 2018-09-14 05:59:21 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2018-09-26 12:15:12 +0300 |
| commit | 92f0eb08c66a73594cf200e65689e767f7f0da5e (patch) | |
| tree | 10067fd34e2b7634dd05382c5067f33be4b7b118 | |
| parent | 5a2ecf0de0d3d7a79e21397ad530904a72b903bb (diff) | |
| download | linux-92f0eb08c66a73594cf200e65689e767f7f0da5e.tar.xz | |
ARM: dts: imx6ul: use nvmem-cells for cpu speed grading
On i.MX6UL, accessing OCOTP directly is wrong because the ocotp clock
needs to be enabled first, so use the nvmem-cells binding instead.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
| -rw-r--r-- | arch/arm/boot/dts/imx6ul.dtsi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi index 7d4dae4995d0..083d3446c41d 100644 --- a/arch/arm/boot/dts/imx6ul.dtsi +++ b/arch/arm/boot/dts/imx6ul.dtsi @@ -89,6 +89,8 @@ "pll1_sys"; arm-supply = <®_arm>; soc-supply = <®_soc>; + nvmem-cells = <&cpu_speed_grade>; + nvmem-cell-names = "speed_grade"; }; }; @@ -942,6 +944,10 @@ tempmon_temp_grade: temp-grade@20 { reg = <0x20 4>; }; + + cpu_speed_grade: speed-grade@10 { + reg = <0x10 4>; + }; }; lcdif: lcdif@21c8000 { |