diff options
author | Rodrigo Siqueira <Rodrigo.Siqueira@amd.com> | 2024-03-26 20:48:40 +0300 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2024-04-12 07:35:20 +0300 |
commit | 7dc363e66258ae41823e0f360101a1e10ca6d4cb (patch) | |
tree | 0a7ead7153e0fe80d0c6805595de4631a07e1662 | |
parent | 9c78dc956a51d05e4f3a5980aff0b083b8cf3a4d (diff) | |
download | linux-7dc363e66258ae41823e0f360101a1e10ca6d4cb.tar.xz |
drm/amd/display: Update DCN10 resource
Update DCN10 to use legacy fast update and ensure that the MPCC count is
the same as the pipe_count.
Acked-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c b/drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c index 81fa2ac781f9..563c5eec83ff 100644 --- a/drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c +++ b/drivers/gpu/drm/amd/display/dc/resource/dcn10/dcn10_resource.c @@ -569,6 +569,7 @@ static const struct dc_debug_options debug_defaults_diags = { .disable_pplib_clock_request = true, .disable_pplib_wm_range = true, .underflow_assert_delay_us = 0xFFFFFFFF, + .enable_legacy_fast_update = true, }; static void dcn10_dpp_destroy(struct dpp **dpp) @@ -1631,6 +1632,7 @@ static bool dcn10_resource_construct( /* valid pipe num */ pool->base.pipe_count = j; pool->base.timing_generator_count = j; + pool->base.mpcc_count = j; /* within dml lib, it is hard code to 4. If ASIC pipe is fused, * the value may be changed |