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author | Marek Vasut <marex@denx.de> | 2022-04-26 22:36:44 +0300 |
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committer | Robert Foss <robert.foss@linaro.org> | 2022-05-02 17:43:20 +0300 |
commit | 666518676d4fea1517043d6008df4f67ea19b5dd (patch) | |
tree | a3fa9507405bf159a4e34606e0cf7c40f4da1cc8 | |
parent | ab0af093bf905a7616eaf247469bc8ee3c117e22 (diff) | |
download | linux-666518676d4fea1517043d6008df4f67ea19b5dd.tar.xz |
dt-bindings: display: bridge: ldb: Implement simple Freescale i.MX8MP LDB bridge
The i.MX8MP contains two syscon registers which are responsible
for configuring the on-SoC DPI-to-LVDS serializer. Add DT binding
which represents this serializer as a bridge.
Acked-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Maxime Ripard <maxime@cerno.tech>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Robby Cai <robby.cai@nxp.com>
Cc: Robert Foss <robert.foss@linaro.org>
Cc: Sam Ravnborg <sam@ravnborg.org>
Cc: Thomas Zimmermann <tzimmermann@suse.de>
Cc: devicetree@vger.kernel.org
To: dri-devel@lists.freedesktop.org
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Link: https://patchwork.freedesktop.org/patch/msgid/20220426193645.244792-1-marex@denx.de
-rw-r--r-- | Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml | 92 |
1 files changed, 92 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml new file mode 100644 index 000000000000..77f174eee424 --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/fsl,ldb.yaml @@ -0,0 +1,92 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/fsl,ldb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale i.MX8MP DPI to LVDS bridge chip + +maintainers: + - Marek Vasut <marex@denx.de> + +description: | + The i.MX8MP mediamix contains two registers which are responsible + for configuring the on-SoC DPI-to-LVDS serializer. This describes + those registers as bridge within the DT. + +properties: + compatible: + const: fsl,imx8mp-ldb + + clocks: + maxItems: 1 + + clock-names: + const: ldb + + ports: + $ref: /schemas/graph.yaml#/properties/ports + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: Video port for DPI input. + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: Video port for LVDS Channel-A output (panel or bridge). + + port@2: + $ref: /schemas/graph.yaml#/properties/port + description: Video port for LVDS Channel-B output (panel or bridge). + + required: + - port@0 + - port@1 + +required: + - compatible + - clocks + - ports + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx8mp-clock.h> + + blk-ctrl { + bridge { + compatible = "fsl,imx8mp-ldb"; + clocks = <&clk IMX8MP_CLK_MEDIA_LDB>; + clock-names = "ldb"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + + ldb_from_lcdif2: endpoint { + remote-endpoint = <&lcdif2_to_ldb>; + }; + }; + + port@1 { + reg = <1>; + + ldb_lvds_ch0: endpoint { + remote-endpoint = <&ldb_to_lvdsx4panel>; + }; + }; + + port@2 { + reg = <2>; + + ldb_lvds_ch1: endpoint { + }; + }; + }; + }; + }; |