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authorEric Biggers <ebiggers@google.com>2025-05-10 06:59:59 +0300
committerEric Biggers <ebiggers@google.com>2025-05-10 07:02:37 +0300
commit648c7fb16f609c53d2659fefb5088af619485ab4 (patch)
treeca35137c423b2acb6411152c86fc69cd46f21e18
parent46e3311607d6c18a760fba4afbd5d24d42abb0f3 (diff)
downloadlinux-648c7fb16f609c53d2659fefb5088af619485ab4.tar.xz
lib/crc: make arch-optimized code use subsys_initcall
Make the architecture-optimized CRC code do its CPU feature checks in subsys_initcalls instead of arch_initcalls. This makes it consistent with arch/*/lib/crypto/ and ensures that it runs after initcalls that possibly could be a prerequisite for kernel-mode FPU, such as x86's xfd_update_static_branch() and loongarch's init_euen_mask(). Note: as far as I can tell, x86's xfd_update_static_branch() isn't *actually* needed for kernel-mode FPU. loongarch's init_euen_mask() is needed to enable save/restore of the vector registers, but loongarch doesn't yet have any CRC or crypto code that uses vector registers anyway. Regardless, let's be consistent with arch/*/lib/crypto/ and robust against any potential future dependency on an arch_initcall. Link: https://lore.kernel.org/r/20250510035959.87995-1-ebiggers@kernel.org Signed-off-by: Eric Biggers <ebiggers@google.com>
-rw-r--r--arch/arm/lib/crc-t10dif.c2
-rw-r--r--arch/arm/lib/crc32.c2
-rw-r--r--arch/arm64/lib/crc-t10dif.c2
-rw-r--r--arch/loongarch/lib/crc32-loongarch.c2
-rw-r--r--arch/mips/lib/crc32-mips.c2
-rw-r--r--arch/powerpc/lib/crc-t10dif.c2
-rw-r--r--arch/powerpc/lib/crc32.c2
-rw-r--r--arch/sparc/lib/crc32.c2
-rw-r--r--arch/x86/lib/crc-t10dif.c2
-rw-r--r--arch/x86/lib/crc32.c2
-rw-r--r--arch/x86/lib/crc64.c2
11 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/lib/crc-t10dif.c b/arch/arm/lib/crc-t10dif.c
index 382437094bdd..1093f8ec13b0 100644
--- a/arch/arm/lib/crc-t10dif.c
+++ b/arch/arm/lib/crc-t10dif.c
@@ -60,7 +60,7 @@ static int __init crc_t10dif_arm_init(void)
}
return 0;
}
-arch_initcall(crc_t10dif_arm_init);
+subsys_initcall(crc_t10dif_arm_init);
static void __exit crc_t10dif_arm_exit(void)
{
diff --git a/arch/arm/lib/crc32.c b/arch/arm/lib/crc32.c
index 7ef7db9c0de7..f2bef8849c7c 100644
--- a/arch/arm/lib/crc32.c
+++ b/arch/arm/lib/crc32.c
@@ -103,7 +103,7 @@ static int __init crc32_arm_init(void)
static_branch_enable(&have_pmull);
return 0;
}
-arch_initcall(crc32_arm_init);
+subsys_initcall(crc32_arm_init);
static void __exit crc32_arm_exit(void)
{
diff --git a/arch/arm64/lib/crc-t10dif.c b/arch/arm64/lib/crc-t10dif.c
index 99d0b5668a28..c2ffe4fdb59d 100644
--- a/arch/arm64/lib/crc-t10dif.c
+++ b/arch/arm64/lib/crc-t10dif.c
@@ -61,7 +61,7 @@ static int __init crc_t10dif_arm64_init(void)
}
return 0;
}
-arch_initcall(crc_t10dif_arm64_init);
+subsys_initcall(crc_t10dif_arm64_init);
static void __exit crc_t10dif_arm64_exit(void)
{
diff --git a/arch/loongarch/lib/crc32-loongarch.c b/arch/loongarch/lib/crc32-loongarch.c
index 8e6d1f517e73..b37cd8537b45 100644
--- a/arch/loongarch/lib/crc32-loongarch.c
+++ b/arch/loongarch/lib/crc32-loongarch.c
@@ -114,7 +114,7 @@ static int __init crc32_loongarch_init(void)
static_branch_enable(&have_crc32);
return 0;
}
-arch_initcall(crc32_loongarch_init);
+subsys_initcall(crc32_loongarch_init);
static void __exit crc32_loongarch_exit(void)
{
diff --git a/arch/mips/lib/crc32-mips.c b/arch/mips/lib/crc32-mips.c
index 84df361e7181..45e4d2c9fbf5 100644
--- a/arch/mips/lib/crc32-mips.c
+++ b/arch/mips/lib/crc32-mips.c
@@ -163,7 +163,7 @@ static int __init crc32_mips_init(void)
static_branch_enable(&have_crc32);
return 0;
}
-arch_initcall(crc32_mips_init);
+subsys_initcall(crc32_mips_init);
static void __exit crc32_mips_exit(void)
{
diff --git a/arch/powerpc/lib/crc-t10dif.c b/arch/powerpc/lib/crc-t10dif.c
index ddd5c4088f50..4253842cc50d 100644
--- a/arch/powerpc/lib/crc-t10dif.c
+++ b/arch/powerpc/lib/crc-t10dif.c
@@ -71,7 +71,7 @@ static int __init crc_t10dif_powerpc_init(void)
static_branch_enable(&have_vec_crypto);
return 0;
}
-arch_initcall(crc_t10dif_powerpc_init);
+subsys_initcall(crc_t10dif_powerpc_init);
static void __exit crc_t10dif_powerpc_exit(void)
{
diff --git a/arch/powerpc/lib/crc32.c b/arch/powerpc/lib/crc32.c
index 42f2dd3c85dd..77e5a37006f0 100644
--- a/arch/powerpc/lib/crc32.c
+++ b/arch/powerpc/lib/crc32.c
@@ -72,7 +72,7 @@ static int __init crc32_powerpc_init(void)
static_branch_enable(&have_vec_crypto);
return 0;
}
-arch_initcall(crc32_powerpc_init);
+subsys_initcall(crc32_powerpc_init);
static void __exit crc32_powerpc_exit(void)
{
diff --git a/arch/sparc/lib/crc32.c b/arch/sparc/lib/crc32.c
index 428fd5588e93..40d4720a42a1 100644
--- a/arch/sparc/lib/crc32.c
+++ b/arch/sparc/lib/crc32.c
@@ -74,7 +74,7 @@ static int __init crc32_sparc_init(void)
pr_info("Using sparc64 crc32c opcode optimized CRC32C implementation\n");
return 0;
}
-arch_initcall(crc32_sparc_init);
+subsys_initcall(crc32_sparc_init);
static void __exit crc32_sparc_exit(void)
{
diff --git a/arch/x86/lib/crc-t10dif.c b/arch/x86/lib/crc-t10dif.c
index d073b3678edc..db7ce59c31ac 100644
--- a/arch/x86/lib/crc-t10dif.c
+++ b/arch/x86/lib/crc-t10dif.c
@@ -29,7 +29,7 @@ static int __init crc_t10dif_x86_init(void)
}
return 0;
}
-arch_initcall(crc_t10dif_x86_init);
+subsys_initcall(crc_t10dif_x86_init);
static void __exit crc_t10dif_x86_exit(void)
{
diff --git a/arch/x86/lib/crc32.c b/arch/x86/lib/crc32.c
index e6a6285cfca8..d09343e2cea9 100644
--- a/arch/x86/lib/crc32.c
+++ b/arch/x86/lib/crc32.c
@@ -88,7 +88,7 @@ static int __init crc32_x86_init(void)
}
return 0;
}
-arch_initcall(crc32_x86_init);
+subsys_initcall(crc32_x86_init);
static void __exit crc32_x86_exit(void)
{
diff --git a/arch/x86/lib/crc64.c b/arch/x86/lib/crc64.c
index 1214ee726c16..351a09f5813e 100644
--- a/arch/x86/lib/crc64.c
+++ b/arch/x86/lib/crc64.c
@@ -39,7 +39,7 @@ static int __init crc64_x86_init(void)
}
return 0;
}
-arch_initcall(crc64_x86_init);
+subsys_initcall(crc64_x86_init);
static void __exit crc64_x86_exit(void)
{