diff options
| author | Aurabindo Pillai <aurabindo.pillai@amd.com> | 2022-02-24 03:05:09 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2022-06-03 23:43:38 +0300 |
| commit | 577359ca178262a64236cc96299714dbff21e9c7 (patch) | |
| tree | 7af39d23f2e60e59b215d75e249ac0093c1541e2 | |
| parent | 3b1229741eda70116e0163affdda377484a788ae (diff) | |
| download | linux-577359ca178262a64236cc96299714dbff21e9c7.tar.xz | |
drm/amd/display: Add DM support for DCN32/DCN321
Add Display Manager specific changes for DCN3.2.x. DM
handles the interaction between the core DC modesetting
code and the drm modesetting infrastructure.
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c index 1c23a844b161..7280db2821ef 100644 --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c @@ -118,6 +118,11 @@ MODULE_FIRMWARE(FIRMWARE_DCN_315_DMUB); #define FIRMWARE_DCN316_DMUB "amdgpu/dcn_3_1_6_dmcub.bin" MODULE_FIRMWARE(FIRMWARE_DCN316_DMUB); +#define FIRMWARE_DCN_V3_2_0_DMCUB "amdgpu/dcn_3_2_0_dmcub.bin" +MODULE_FIRMWARE(FIRMWARE_DCN_V3_2_0_DMCUB); +#define FIRMWARE_DCN_V3_2_1_DMCUB "amdgpu/dcn_3_2_1_dmcub.bin" +MODULE_FIRMWARE(FIRMWARE_DCN_V3_2_1_DMCUB); + #define FIRMWARE_RAVEN_DMCU "amdgpu/raven_dmcu.bin" MODULE_FIRMWARE(FIRMWARE_RAVEN_DMCU); @@ -1803,6 +1808,8 @@ static int load_dmcu_fw(struct amdgpu_device *adev) case IP_VERSION(3, 1, 3): case IP_VERSION(3, 1, 5): case IP_VERSION(3, 1, 6): + case IP_VERSION(3, 2, 0): + case IP_VERSION(3, 2, 1): return 0; default: break; @@ -1926,6 +1933,14 @@ static int dm_dmub_sw_init(struct amdgpu_device *adev) dmub_asic = DMUB_ASIC_DCN316; fw_name_dmub = FIRMWARE_DCN316_DMUB; break; + case IP_VERSION(3, 2, 0): + dmub_asic = DMUB_ASIC_DCN32; + fw_name_dmub = FIRMWARE_DCN_V3_2_0_DMCUB; + break; + case IP_VERSION(3, 2, 1): + dmub_asic = DMUB_ASIC_DCN321; + fw_name_dmub = FIRMWARE_DCN_V3_2_1_DMCUB; + break; default: /* ASIC doesn't support DMUB. */ return 0; @@ -4235,6 +4250,8 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) case IP_VERSION(3, 1, 3): case IP_VERSION(3, 1, 5): case IP_VERSION(3, 1, 6): + case IP_VERSION(3, 2, 0): + case IP_VERSION(3, 2, 1): case IP_VERSION(2, 1, 0): if (register_outbox_irq_handlers(dm->adev)) { DRM_ERROR("DM: Failed to initialize IRQ\n"); @@ -4253,6 +4270,8 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) case IP_VERSION(3, 1, 3): case IP_VERSION(3, 1, 5): case IP_VERSION(3, 1, 6): + case IP_VERSION(3, 2, 0): + case IP_VERSION(3, 2, 1): psr_feature_enabled = true; break; default: @@ -4370,6 +4389,8 @@ static int amdgpu_dm_initialize_drm_device(struct amdgpu_device *adev) case IP_VERSION(3, 1, 3): case IP_VERSION(3, 1, 5): case IP_VERSION(3, 1, 6): + case IP_VERSION(3, 2, 0): + case IP_VERSION(3, 2, 1): if (dcn10_register_irq_handlers(dm->adev)) { DRM_ERROR("DM: Failed to initialize IRQ\n"); goto fail; @@ -4556,6 +4577,8 @@ static int dm_early_init(void *handle) case IP_VERSION(3, 1, 3): case IP_VERSION(3, 1, 5): case IP_VERSION(3, 1, 6): + case IP_VERSION(3, 2, 0): + case IP_VERSION(3, 2, 1): adev->mode_info.num_crtc = 4; adev->mode_info.num_hpd = 4; adev->mode_info.num_dig = 4; |