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| author | Ludovic Barre <ludovic.barre@st.com> | 2019-03-08 16:12:20 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-03-15 19:32:33 +0300 |
| commit | 5356c2c70e385198e1a753ee364323f2fc01f759 (patch) | |
| tree | 5dfcc9921a1917619cee0892c7d35b9403be434b | |
| parent | 26843bb128590edd7eba1ad7ce22e4b9f1066ce3 (diff) | |
| download | linux-5356c2c70e385198e1a753ee364323f2fc01f759.tar.xz | |
spi: spi-mem: stm32-qspi: avoid memory corruption at low frequency
This patch solves a memory corruption seen at 8 MHz.
To avoid such issue, timeout counter is disabled.
Signed-off-by: Ludovic Barre <ludovic.barre@st.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
| -rw-r--r-- | drivers/spi/spi-stm32-qspi.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/drivers/spi/spi-stm32-qspi.c b/drivers/spi/spi-stm32-qspi.c index 3b2a9a6b990d..7354f9d68dba 100644 --- a/drivers/spi/spi-stm32-qspi.c +++ b/drivers/spi/spi-stm32-qspi.c @@ -76,7 +76,6 @@ #define QSPI_PSMAR 0x28 #define QSPI_PIR 0x2c #define QSPI_LPTR 0x30 -#define LPTR_DFT_TIMEOUT 0x10 #define STM32_QSPI_MAX_MMAP_SZ SZ_256M #define STM32_QSPI_MAX_NORCHIP 2 @@ -372,8 +371,7 @@ static int stm32_qspi_setup(struct spi_device *spi) flash->presc = presc; mutex_lock(&qspi->lock); - writel_relaxed(LPTR_DFT_TIMEOUT, qspi->io_base + QSPI_LPTR); - cr = FIELD_PREP(CR_FTHRES_MASK, 3) | CR_TCEN | CR_SSHIFT | CR_EN; + cr = FIELD_PREP(CR_FTHRES_MASK, 3) | CR_SSHIFT | CR_EN; writel_relaxed(cr, qspi->io_base + QSPI_CR); /* set dcr fsize to max address */ |