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| author | Dhruva Gole <d-gole@ti.com> | 2024-09-19 16:13:40 +0300 |
|---|---|---|
| committer | Viresh Kumar <viresh.kumar@linaro.org> | 2024-10-01 12:27:08 +0300 |
| commit | 53205a7903666d35709954d9fb7370a8150d5e0e (patch) | |
| tree | bb4e6e87c742df6a11e7ad65f97f2c0ae6edaa83 | |
| parent | 217fa3961a5915a12e4ef6982e593e5215f8499c (diff) | |
| download | linux-53205a7903666d35709954d9fb7370a8150d5e0e.tar.xz | |
dt-bindings: opp: operating-points-v2-ti-cpu: Describe opp-supported-hw
It seems like we missed migrating the complete information from the old
DT binding where we had described what the opp-supported-hw is supposed
to describe. Hence, bring back the description from the previous binding
to the current one along with a bit more context on what the values are
supposed to be.
Fixes: e576a9a8603f ("dt-bindings: cpufreq: Convert ti-cpufreq to json schema")
Signed-off-by: Dhruva Gole <d-gole@ti.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml index fd0c8d5c5f3e..624d1f3f1382 100644 --- a/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml +++ b/Documentation/devicetree/bindings/opp/operating-points-v2-ti-cpu.yaml @@ -45,7 +45,25 @@ patternProperties: clock-latency-ns: true opp-hz: true opp-microvolt: true - opp-supported-hw: true + opp-supported-hw: + items: + items: + - description: + The revision of the SoC the OPP is supported by. + This can be easily obtained from the datasheet of the + part being ordered/used. For example, it will be 0x01 for SR1.0 + + - description: + The eFuse bits that indicate the particular OPP is available. + The device datasheet has a table talking about Device Speed Grades. + This table is to be sorted with only the unique elements of the + MAXIMUM OPERATING FREQUENCY starting from the first row which + tells the lowest OPP, to the highest. The corresponding bits + need to be set based on N elements of speed grade the device supports. + So, if there are 3 possible unique MAXIMUM OPERATING FREQUENCY + in the table, then BIT(0) | (1) | (2) will be set, which means + the value shall be 0x7. + opp-suspend: true turbo-mode: true |