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authorGareth Williams <gareth.williams.jx@renesas.com>2019-09-18 11:04:34 +0300
committerMark Brown <broonie@kernel.org>2019-10-01 14:32:44 +0300
commit47cf13bc763c891c6192184c5e5aa8c1b331b2ff (patch)
tree5d7d177898742098f398b0ef3a3940513c54c50b
parentda182a61fce01dbd7c4a78c68a34af110f00e36f (diff)
downloadlinux-47cf13bc763c891c6192184c5e5aa8c1b331b2ff.tar.xz
dt-bindings: snps,dw-apb-ssi: Add optional clock domain information
Note in the bindings documentation that pclk should be renamed if a clock domain is used to enable the optional bus clock. Signed-off-by: Gareth Williams <gareth.williams.jx@renesas.com> Link: https://lore.kernel.org/r/1568793876-9009-3-git-send-email-gareth.williams.jx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt3
1 files changed, 2 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt
index f54c8c36395e..3ed08ee9feba 100644
--- a/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt
+++ b/Documentation/devicetree/bindings/spi/snps,dw-apb-ssi.txt
@@ -16,7 +16,8 @@ Required properties:
Optional properties:
- clock-names : Contains the names of the clocks:
"ssi_clk", for the core clock used to generate the external SPI clock.
- "pclk", the interface clock, required for register access.
+ "pclk", the interface clock, required for register access. If a clock domain
+ used to enable this clock then it should be named "pclk_clkdomain".
- cs-gpios : Specifies the gpio pins to be used for chipselects.
- num-cs : The number of chipselects. If omitted, this will default to 4.
- reg-io-width : The I/O register width (in bytes) implemented by this