diff options
author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2023-01-15 02:34:55 +0300 |
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committer | Neil Armstrong <neil.armstrong@linaro.org> | 2023-01-19 10:57:14 +0300 |
commit | 46f73c1c037eed8e5fd61cc39c77b0988148b50b (patch) | |
tree | a099629d3e4e754c68376d10f55e863112d57d23 | |
parent | 12cdc236cf83eb55560f52dd378f05d5798452ba (diff) | |
download | linux-46f73c1c037eed8e5fd61cc39c77b0988148b50b.tar.xz |
ARM: dts: meson8b: Add more L2 (PL310) cache properties
Add more L2 cache properties which are used by the 3.10 vendor kernel
but have not made it upstream yet.
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Link: https://lore.kernel.org/r/20230114233455.2005047-3-martin.blumenstingl@googlemail.com
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
-rw-r--r-- | arch/arm/boot/dts/meson8b.dtsi | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/meson8b.dtsi b/arch/arm/boot/dts/meson8b.dtsi index cf9c04a61ba3..2d80c009bdfa 100644 --- a/arch/arm/boot/dts/meson8b.dtsi +++ b/arch/arm/boot/dts/meson8b.dtsi @@ -643,6 +643,9 @@ arm,filter-ranges = <0x100000 0xc0000000>; prefetch-data = <1>; prefetch-instr = <1>; + arm,prefetch-offset = <7>; + arm,double-linefill = <1>; + arm,prefetch-drop = <1>; arm,shared-override; }; |