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authorSerge Semin <Sergey.Semin@baikalelectronics.ru>2021-11-15 21:19:17 +0300
committerMark Brown <broonie@kernel.org>2021-11-16 17:30:10 +0300
commit44ebcb44584f81d1d38fafb45cf57d651f44616e (patch)
treedb8ea6a27474eb07be25a1ce12c281e371e3eff0
parent2b8a47e0b6984b9795baa20ddcbd37e9ea9b2a91 (diff)
downloadlinux-44ebcb44584f81d1d38fafb45cf57d651f44616e.tar.xz
spi: dw: Define the capabilities in a continuous bit-flags set
Since the DW_SPI_CAP_DWC_HSSI capability has just been replaced with using the DW SSI IP-core versions interface, the DW SPI capability flags are now represented with a gap. Let's fix it by redefining the DW_SPI_CAP_DFS32 macro to setting BIT(2) of the capabilities field. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Suggested-by: Andy Shevchenko <andy.shevchenko@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Link: https://lore.kernel.org/r/20211115181917.7521-8-Sergey.Semin@baikalelectronics.ru Signed-off-by: Mark Brown <broonie@kernel.org>
-rw-r--r--drivers/spi/spi-dw.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/spi/spi-dw.h b/drivers/spi/spi-dw.h
index 8334e6b35f89..d5ee5130601e 100644
--- a/drivers/spi/spi-dw.h
+++ b/drivers/spi/spi-dw.h
@@ -32,7 +32,7 @@
/* DW SPI controller capabilities */
#define DW_SPI_CAP_CS_OVERRIDE BIT(0)
#define DW_SPI_CAP_KEEMBAY_MST BIT(1)
-#define DW_SPI_CAP_DFS32 BIT(3)
+#define DW_SPI_CAP_DFS32 BIT(2)
/* Register offsets (Generic for both DWC APB SSI and DWC SSI IP-cores) */
#define DW_SPI_CTRLR0 0x00