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| author | João Mário Domingos <joao.mario@tecnico.ulisboa.pt> | 2021-11-16 18:48:10 +0300 |
|---|---|---|
| committer | Hal Feng <hal.feng@starfivetech.com> | 2024-03-05 10:18:29 +0300 |
| commit | 4390f00ffe9312df6658176004b0fae41c2066d3 (patch) | |
| tree | 7c49e2ca78f530f261cce00703c6f10403c510b7 | |
| parent | 6f46d9c4c1893134d6ddb056ac01992c2e89cc13 (diff) | |
| download | linux-4390f00ffe9312df6658176004b0fae41c2066d3.tar.xz | |
RISC-V: Support CPUID for risc-v in perf
This patch creates the header.c file for the risc-v architecture and introduces support for
PMU identification through sysfs.
It is now possible to configure pmu-events in risc-v.
Depends on patch [1], that introduces the id sysfs file.
Signed-off-by: João Mário Domingos <joao.mario@tecnico.ulisboa.pt>
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
| -rw-r--r-- | drivers/perf/riscv_pmu.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/drivers/perf/riscv_pmu.c b/drivers/perf/riscv_pmu.c index 0dda70e1ef90..acb4614a7a84 100644 --- a/drivers/perf/riscv_pmu.c +++ b/drivers/perf/riscv_pmu.c @@ -18,6 +18,23 @@ #include <asm/sbi.h> +PMU_FORMAT_ATTR(event, "config:0-63"); + +static struct attribute *riscv_arch_formats_attr[] = { + &format_attr_event.attr, + NULL, +}; + +static struct attribute_group riscv_pmu_format_group = { + .name = "format", + .attrs = riscv_arch_formats_attr, +}; + +static const struct attribute_group *riscv_pmu_attr_groups[] = { + &riscv_pmu_format_group, + NULL, +}; + static bool riscv_perf_user_access(struct perf_event *event) { return ((event->attr.type == PERF_TYPE_HARDWARE) || @@ -414,6 +431,7 @@ struct riscv_pmu *riscv_pmu_alloc(void) cpuc->events[i] = NULL; } pmu->pmu = (struct pmu) { + .attr_groups = riscv_pmu_attr_groups, .event_init = riscv_pmu_event_init, .event_mapped = riscv_pmu_event_mapped, .event_unmapped = riscv_pmu_event_unmapped, |