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| author | Sibi Sankar <sibis@codeaurora.org> | 2020-11-24 09:21:16 +0300 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-11-25 02:04:41 +0300 |
| commit | 3c9c31c2523ecd5b609a2eecb5ad524ef4fc931c (patch) | |
| tree | 75cef6e86339c2627112e6567c409d69c6520496 | |
| parent | 8fd01e01fd6f8ba67e4ed8c5be0ab76d06156287 (diff) | |
| download | linux-3c9c31c2523ecd5b609a2eecb5ad524ef4fc931c.tar.xz | |
arm64: dts: qcom: sc7180: Add DDR/L3 votes for the pro variant
Add DDR/L3 bandwidth votes for the pro variant of SC7180 SoC, as it support
frequencies upto 2.5 GHz.
Reviewed-by: Douglas Anderson <dianders@chromium.org>
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/1606198876-3515-2-git-send-email-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sc7180.dtsi | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index c0efb101b0d6..98210fdcbe25 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -527,6 +527,11 @@ opp-hz = /bits/ 64 <2400000000>; opp-peak-kBps = <8532000 23347200>; }; + + cpu6_opp16: opp-2553600000 { + opp-hz = /bits/ 64 <2553600000>; + opp-peak-kBps = <8532000 23347200>; + }; }; memory@80000000 { |