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| author | Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> | 2025-01-14 21:30:03 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-02-03 13:07:05 +0300 |
| commit | 3b0016a613e5256ef3a782286b05c7f549908ad1 (patch) | |
| tree | a5e212bc6ddf8250d47d555e17df73077403dad1 | |
| parent | b32e27f633044b1670f4cb9abe95ae43496c7ad0 (diff) | |
| download | linux-3b0016a613e5256ef3a782286b05c7f549908ad1.tar.xz | |
clk: renesas: r8a779a0: Add ISP core clocks
Add the ISP core modules clock for Renesas R-Car V3U.
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250114183005.2761213-2-niklas.soderlund+renesas@ragnatech.se
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
| -rw-r--r-- | drivers/clk/renesas/r8a779a0-cpg-mssr.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c index 4a5b4e2afa92..1be7b9592aa6 100644 --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c @@ -138,6 +138,10 @@ static const struct cpg_core_clk r8a779a0_core_clks[] __initconst = { }; static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = { + DEF_MOD("isp0", 16, R8A779A0_CLK_S1D1), + DEF_MOD("isp1", 17, R8A779A0_CLK_S1D1), + DEF_MOD("isp2", 18, R8A779A0_CLK_S1D1), + DEF_MOD("isp3", 19, R8A779A0_CLK_S1D1), DEF_MOD("avb0", 211, R8A779A0_CLK_S3D2), DEF_MOD("avb1", 212, R8A779A0_CLK_S3D2), DEF_MOD("avb2", 213, R8A779A0_CLK_S3D2), |