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| author | Marc Zyngier <maz@kernel.org> | 2020-09-18 16:11:25 +0300 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2020-09-29 18:08:17 +0300 |
| commit | 31c84d6c9cde673b3866972552ec52e4c522b4fa (patch) | |
| tree | ddc0e581bf96c1c173aba1ae982ff2cd7916d1cd | |
| parent | d63d975a71b332df36cc802e6e77a462af6b9fef (diff) | |
| download | linux-31c84d6c9cde673b3866972552ec52e4c522b4fa.tar.xz | |
arm64: Get rid of arm64_ssbd_state
Out with the old ghost, in with the new...
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Will Deacon <will@kernel.org>
| -rw-r--r-- | arch/arm64/include/asm/cpufeature.h | 14 | ||||
| -rw-r--r-- | arch/arm64/kernel/cpu_errata.c | 2 |
2 files changed, 0 insertions, 16 deletions
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 3b48aa121cee..fba6700b457b 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -698,20 +698,6 @@ static inline bool system_supports_tlb_range(void) cpus_have_const_cap(ARM64_HAS_TLB_RANGE); } -#define ARM64_SSBD_UNKNOWN -1 -#define ARM64_SSBD_FORCE_DISABLE 0 -#define ARM64_SSBD_KERNEL 1 -#define ARM64_SSBD_FORCE_ENABLE 2 -#define ARM64_SSBD_MITIGATED 3 - -static inline int arm64_get_ssbd_state(void) -{ - extern int ssbd_state; - return ssbd_state; -} - -void arm64_set_ssbd_mitigation(bool state); - extern int do_emulate_mrs(struct pt_regs *regs, u32 sys_reg, u32 rt); static inline u32 id_aa64mmfr0_parange_to_phys_shift(int parange) diff --git a/arch/arm64/kernel/cpu_errata.c b/arch/arm64/kernel/cpu_errata.c index 7e9caef13db4..6c8303559beb 100644 --- a/arch/arm64/kernel/cpu_errata.c +++ b/arch/arm64/kernel/cpu_errata.c @@ -106,8 +106,6 @@ cpu_enable_trap_ctr_access(const struct arm64_cpu_capabilities *cap) sysreg_clear_set(sctlr_el1, SCTLR_EL1_UCT, 0); } -int ssbd_state __read_mostly = ARM64_SSBD_UNKNOWN; - #ifdef CONFIG_ARM64_ERRATUM_1463225 DEFINE_PER_CPU(int, __in_cortex_a76_erratum_1463225_wa); |