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author | Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> | 2023-02-28 19:47:51 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2023-05-11 17:03:09 +0300 |
commit | 2ebb3f120e340e0c3f421093a55f1aa3e3c4fe6c (patch) | |
tree | 8d10075b5bfb1cd0505d4fb5927912cb3853c133 | |
parent | 671c3a4d7d848d78cd2c3d7e7ee50750a7f6a4be (diff) | |
download | linux-2ebb3f120e340e0c3f421093a55f1aa3e3c4fe6c.tar.xz |
ARM: dts: qcom: ipq4019: Fix the PCI I/O port range
[ Upstream commit 2540279e9a9e74fc880d1e4c83754ecfcbe290a0 ]
For 1MiB of the I/O region, the I/O ports of the legacy PCI devices are
located in the range of 0x0 to 0x100000. Hence, fix the bogus PCI address
(0x40200000) specified in the ranges property for I/O region.
While at it, let's use the missing 0x prefix for the addresses.
Fixes: 187519403273 ("ARM: dts: ipq4019: Add a few peripheral nodes")
Reported-by: Arnd Bergmann <arnd@arndb.de>
Link: https://lore.kernel.org/linux-arm-msm/7c5dfa87-41df-4ba7-b0e4-72c8386402a8@app.fastmail.com/
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230228164752.55682-16-manivannan.sadhasivam@linaro.org
Signed-off-by: Sasha Levin <sashal@kernel.org>
-rw-r--r-- | arch/arm/boot/dts/qcom-ipq4019.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi index b23591110bd2..02e13d8c222a 100644 --- a/arch/arm/boot/dts/qcom-ipq4019.dtsi +++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi @@ -426,8 +426,8 @@ #address-cells = <3>; #size-cells = <2>; - ranges = <0x81000000 0 0x40200000 0x40200000 0 0x00100000>, - <0x82000000 0 0x40300000 0x40300000 0 0x00d00000>; + ranges = <0x81000000 0x0 0x00000000 0x40200000 0x0 0x00100000>, + <0x82000000 0x0 0x40300000 0x40300000 0x0 0x00d00000>; interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "msi"; |