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| author | Emil Renner Berthing <kernel@esmil.dk> | 2021-11-20 23:33:08 +0300 |
|---|---|---|
| committer | Emil Renner Berthing <emil.renner.berthing@canonical.com> | 2024-07-22 02:20:58 +0300 |
| commit | 270cf25d2a6b81c34a1bd6e1439e8c7678506ee5 (patch) | |
| tree | c758223038bad6535ae2e9406ee2d4bbd62f3edd | |
| parent | 886a897bcb73f15f847c54c73925ff5f70167fba (diff) | |
| download | linux-270cf25d2a6b81c34a1bd6e1439e8c7678506ee5.tar.xz | |
riscv: dts: starfive: Add StarFive JH7100 audio reset node
Add device tree node for the audio resets on the StarFive JH7100 RISC-V
SoC.
Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
| -rw-r--r-- | arch/riscv/boot/dts/starfive/jh7100.dtsi | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/riscv/boot/dts/starfive/jh7100.dtsi b/arch/riscv/boot/dts/starfive/jh7100.dtsi index f260c0005312..be03aceb6aef 100644 --- a/arch/riscv/boot/dts/starfive/jh7100.dtsi +++ b/arch/riscv/boot/dts/starfive/jh7100.dtsi @@ -249,6 +249,12 @@ #clock-cells = <1>; }; + audrst: reset-controller@10490000 { + compatible = "starfive,jh7100-audrst"; + reg = <0x0 0x10490000 0x0 0x10000>; + #reset-cells = <1>; + }; + clkgen: clock-controller@11800000 { compatible = "starfive,jh7100-clkgen"; reg = <0x0 0x11800000 0x0 0x10000>; |