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author | Yongqiang Niu <yongqiang.niu@mediatek.com> | 2022-12-15 10:28:03 +0300 |
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committer | Jassi Brar <jaswinder.singh@linaro.org> | 2022-12-19 05:40:29 +0300 |
commit | 23ba2e7fa282dd8e6c51c284ab1ea184c96c88b2 (patch) | |
tree | b5716999621381c817b6055c83e217a7cde08d53 | |
parent | 8b9b08bd8d6adda032ae65a3a2f87ee989500c02 (diff) | |
download | linux-23ba2e7fa282dd8e6c51c284ab1ea184c96c88b2.tar.xz |
mailbox: mtk-cmdq: Use GCE_CTRL_BY_SW definition instead of number
Use GCE_CTRL_BY_SW definition instead of number
Signed-off-by: Yongqiang Niu <yongqiang.niu@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: CK Hu <ck.hu@mediatek.com>
Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
-rw-r--r-- | drivers/mailbox/mtk-cmdq-mailbox.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/mailbox/mtk-cmdq-mailbox.c b/drivers/mailbox/mtk-cmdq-mailbox.c index 9465f9081515..c3cb24f51699 100644 --- a/drivers/mailbox/mtk-cmdq-mailbox.c +++ b/drivers/mailbox/mtk-cmdq-mailbox.c @@ -38,6 +38,7 @@ #define CMDQ_THR_PRIORITY 0x40 #define GCE_GCTL_VALUE 0x48 +#define GCE_CTRL_BY_SW GENMASK(2, 0) #define CMDQ_THR_ACTIVE_SLOT_CYCLES 0x3200 #define CMDQ_THR_ENABLED 0x1 @@ -129,7 +130,8 @@ static void cmdq_init(struct cmdq *cmdq) WARN_ON(clk_bulk_enable(cmdq->gce_num, cmdq->clocks)); if (cmdq->control_by_sw) - writel(0x7, cmdq->base + GCE_GCTL_VALUE); + writel(GCE_CTRL_BY_SW, cmdq->base + GCE_GCTL_VALUE); + writel(CMDQ_THR_ACTIVE_SLOT_CYCLES, cmdq->base + CMDQ_THR_SLOT_CYCLES); for (i = 0; i <= CMDQ_MAX_EVENT; i++) writel(i, cmdq->base + CMDQ_SYNC_TOKEN_UPDATE); |