diff options
| author | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-01-28 13:37:54 +0300 |
|---|---|---|
| committer | Ville Syrjälä <ville.syrjala@linux.intel.com> | 2022-02-01 12:33:23 +0300 |
| commit | 23015f6f900b8b158f6811b85de1f96769be4dc7 (patch) | |
| tree | ef251dace0ab8ce5cc5ef992888ec1adb18d061c | |
| parent | 1d06c820b2b7ceb38bdf0775fac495db4ad4d10e (diff) | |
| download | linux-23015f6f900b8b158f6811b85de1f96769be4dc7.tar.xz | |
drm/i915: Program pch transcoder m2/n2
Program the PCH transcoder M2/N2 values appropriately. We're
still missing a few things for PCH port DRRS but at least this
means we can do readout/state check for dp_m2_n2 unconditionally.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220128103757.22461-15-ville.syrjala@linux.intel.com
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
| -rw-r--r-- | drivers/gpu/drm/i915/display/g4x_dp.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_pch_display.c | 36 | ||||
| -rw-r--r-- | drivers/gpu/drm/i915/display/intel_pch_display.h | 6 |
3 files changed, 36 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/display/g4x_dp.c b/drivers/gpu/drm/i915/display/g4x_dp.c index 34c7640386b8..f67bbaaad8e0 100644 --- a/drivers/gpu/drm/i915/display/g4x_dp.c +++ b/drivers/gpu/drm/i915/display/g4x_dp.c @@ -339,7 +339,8 @@ static void g4x_dp_get_m_n(struct intel_crtc_state *crtc_state) struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); if (crtc_state->has_pch_encoder) { - intel_pch_transcoder_get_m_n(crtc, &crtc_state->dp_m_n); + intel_pch_transcoder_get_m1_n1(crtc, &crtc_state->dp_m_n); + intel_pch_transcoder_get_m2_n2(crtc, &crtc_state->dp_m2_n2); } else { intel_cpu_transcoder_get_m1_n1(crtc, crtc_state->cpu_transcoder, &crtc_state->dp_m_n); diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.c b/drivers/gpu/drm/i915/display/intel_pch_display.c index 3bd96411f306..9192769e3337 100644 --- a/drivers/gpu/drm/i915/display/intel_pch_display.c +++ b/drivers/gpu/drm/i915/display/intel_pch_display.c @@ -88,8 +88,8 @@ static void assert_pch_transcoder_disabled(struct drm_i915_private *dev_priv, pipe_name(pipe)); } -static void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc, - const struct intel_link_m_n *m_n) +static void intel_pch_transcoder_set_m1_n1(struct intel_crtc *crtc, + const struct intel_link_m_n *m_n) { struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; @@ -99,8 +99,19 @@ static void intel_pch_transcoder_set_m_n(struct intel_crtc *crtc, PCH_TRANS_LINK_M1(pipe), PCH_TRANS_LINK_N1(pipe)); } -void intel_pch_transcoder_get_m_n(struct intel_crtc *crtc, - struct intel_link_m_n *m_n) +static void intel_pch_transcoder_set_m2_n2(struct intel_crtc *crtc, + const struct intel_link_m_n *m_n) +{ + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + enum pipe pipe = crtc->pipe; + + intel_set_m_n(dev_priv, m_n, + PCH_TRANS_DATA_M2(pipe), PCH_TRANS_DATA_N2(pipe), + PCH_TRANS_LINK_M2(pipe), PCH_TRANS_LINK_N2(pipe)); +} + +void intel_pch_transcoder_get_m1_n1(struct intel_crtc *crtc, + struct intel_link_m_n *m_n) { struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); enum pipe pipe = crtc->pipe; @@ -110,6 +121,17 @@ void intel_pch_transcoder_get_m_n(struct intel_crtc *crtc, PCH_TRANS_LINK_M1(pipe), PCH_TRANS_LINK_N1(pipe)); } +void intel_pch_transcoder_get_m2_n2(struct intel_crtc *crtc, + struct intel_link_m_n *m_n) +{ + struct drm_i915_private *dev_priv = to_i915(crtc->base.dev); + enum pipe pipe = crtc->pipe; + + intel_get_m_n(dev_priv, m_n, + PCH_TRANS_DATA_M2(pipe), PCH_TRANS_DATA_N2(pipe), + PCH_TRANS_LINK_M2(pipe), PCH_TRANS_LINK_N2(pipe)); +} + static void ilk_pch_transcoder_set_timings(const struct intel_crtc_state *crtc_state, enum pipe pch_transcoder) { @@ -300,8 +322,10 @@ void ilk_pch_enable(struct intel_atomic_state *state, /* set transcoder timing, panel must allow it */ assert_pps_unlocked(dev_priv, pipe); - if (intel_crtc_has_dp_encoder(crtc_state)) - intel_pch_transcoder_set_m_n(crtc, &crtc_state->dp_m_n); + if (intel_crtc_has_dp_encoder(crtc_state)) { + intel_pch_transcoder_set_m1_n1(crtc, &crtc_state->dp_m_n); + intel_pch_transcoder_set_m2_n2(crtc, &crtc_state->dp_m2_n2); + } ilk_pch_transcoder_set_timings(crtc_state, pipe); intel_fdi_normal_train(crtc); diff --git a/drivers/gpu/drm/i915/display/intel_pch_display.h b/drivers/gpu/drm/i915/display/intel_pch_display.h index 9a317b361a96..749473d99320 100644 --- a/drivers/gpu/drm/i915/display/intel_pch_display.h +++ b/drivers/gpu/drm/i915/display/intel_pch_display.h @@ -27,7 +27,9 @@ void lpt_pch_disable(struct intel_atomic_state *state, struct intel_crtc *crtc); void lpt_pch_get_config(struct intel_crtc_state *crtc_state); -void intel_pch_transcoder_get_m_n(struct intel_crtc *crtc, - struct intel_link_m_n *m_n); +void intel_pch_transcoder_get_m1_n1(struct intel_crtc *crtc, + struct intel_link_m_n *m_n); +void intel_pch_transcoder_get_m2_n2(struct intel_crtc *crtc, + struct intel_link_m_n *m_n); #endif |