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author | Jernej Skrabec <jernej.skrabec@siol.net> | 2020-08-25 20:13:57 +0300 |
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committer | Maxime Ripard <maxime@cerno.tech> | 2020-08-27 18:12:38 +0300 |
commit | 166405e1f89acf7b24d95b90dbd1f78ec1ab3ec6 (patch) | |
tree | 40e70e1bf65f2359b124f5414964fe694a98e2c5 | |
parent | ee30214a4a79f1cea0b71d5412ba366a4b498937 (diff) | |
download | linux-166405e1f89acf7b24d95b90dbd1f78ec1ab3ec6.tar.xz |
ARM: dts: sun8i: r40: Add IR nodes
Allwinner R40 has two IR cores, add nodes for them.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200825171358.1286902-3-jernej.skrabec@siol.net
-rw-r--r-- | arch/arm/boot/dts/sun8i-r40.dtsi | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi index d481fe7989b8..dff9a3dc1fba 100644 --- a/arch/arm/boot/dts/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/sun8i-r40.dtsi @@ -513,6 +513,16 @@ function = "i2c4"; }; + ir0_pins: ir0-pins { + pins = "PB4"; + function = "ir0"; + }; + + ir1_pins: ir1-pins { + pins = "PB23"; + function = "ir1"; + }; + mmc0_pins: mmc0-pins { pins = "PF0", "PF1", "PF2", "PF3", "PF4", "PF5"; @@ -591,6 +601,32 @@ clocks = <&osc24M>; }; + ir0: ir@1c21800 { + compatible = "allwinner,sun8i-r40-ir", + "allwinner,sun6i-a31-ir"; + reg = <0x01c21800 0x400>; + pinctrl-0 = <&ir0_pins>; + pinctrl-names = "default"; + clocks = <&ccu CLK_BUS_IR0>, <&ccu CLK_IR0>; + clock-names = "apb", "ir"; + interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; + resets = <&ccu RST_BUS_IR0>; + status = "disabled"; + }; + + ir1: ir@1c21c00 { + compatible = "allwinner,sun8i-r40-ir", + "allwinner,sun6i-a31-ir"; + reg = <0x01c21c00 0x400>; + pinctrl-0 = <&ir1_pins>; + pinctrl-names = "default"; + clocks = <&ccu CLK_BUS_IR1>, <&ccu CLK_IR1>; + clock-names = "apb", "ir"; + interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; + resets = <&ccu RST_BUS_IR1>; + status = "disabled"; + }; + ths: thermal-sensor@1c24c00 { compatible = "allwinner,sun8i-r40-ths"; reg = <0x01c24c00 0x100>; |