diff options
| author | Jaswinder Singh Rajput <jaswinder@kernel.org> | 2009-07-04 06:24:53 +0400 | 
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2009-07-04 13:19:53 +0400 | 
| commit | 09b22c85d59dd935fdfa71655a443785e3f99c18 (patch) | |
| tree | 0d4be8c2f8d73e1585557bb2068a6c7687569fd2 | |
| parent | 3ec8dbcb09bb6df83993ca03e88cb85e3aaa8edb (diff) | |
| download | linux-09b22c85d59dd935fdfa71655a443785e3f99c18.tar.xz | |
x86: Clean up mtrr/state.c
Fix:
  WARNING: Use #include <linux/io.h> instead of <asm/io.h>
  WARNING: line over 80 characters X 4
arch/x86/kernel/cpu/mtrr/state.o:
   text	   data	    bss	    dec	    hex	filename
    864	      0	      0	    864	    360	state.o.before
    864	      0	      0	    864	    360	state.o.after
md5:
   c5c4364b9aeac74d70111e1e49667a2c  state.o.before.asm
   c5c4364b9aeac74d70111e1e49667a2c  state.o.after.asm
Suggested-by: Alan Cox <alan@lxorguk.ukuu.org.uk>
Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@gmail.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Yinghai Lu <yinghai@kernel.org>
LKML-Reference: <20090703164225.GA21447@elte.hu>
[ More cleanups ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
| -rw-r--r-- | arch/x86/kernel/cpu/mtrr/state.c | 68 | 
1 files changed, 40 insertions, 28 deletions
diff --git a/arch/x86/kernel/cpu/mtrr/state.c b/arch/x86/kernel/cpu/mtrr/state.c index 1f5fb1588d1f..dfc80b4e6b0d 100644 --- a/arch/x86/kernel/cpu/mtrr/state.c +++ b/arch/x86/kernel/cpu/mtrr/state.c @@ -1,24 +1,25 @@ -#include <linux/mm.h>  #include <linux/init.h> -#include <asm/io.h> -#include <asm/mtrr.h> -#include <asm/msr.h> +#include <linux/io.h> +#include <linux/mm.h> +  #include <asm/processor-cyrix.h>  #include <asm/processor-flags.h> -#include "mtrr.h" +#include <asm/mtrr.h> +#include <asm/msr.h> +#include "mtrr.h" -/*  Put the processor into a state where MTRRs can be safely set  */ +/* Put the processor into a state where MTRRs can be safely set */  void set_mtrr_prepare_save(struct set_mtrr_context *ctxt)  {  	unsigned int cr0; -	/*  Disable interrupts locally  */ +	/* Disable interrupts locally */  	local_irq_save(ctxt->flags);  	if (use_intel() || is_cpu(CYRIX)) { -		/*  Save value of CR4 and clear Page Global Enable (bit 7)  */ +		/* Save value of CR4 and clear Page Global Enable (bit 7) */  		if (cpu_has_pge) {  			ctxt->cr4val = read_cr4();  			write_cr4(ctxt->cr4val & ~X86_CR4_PGE); @@ -33,50 +34,61 @@ void set_mtrr_prepare_save(struct set_mtrr_context *ctxt)  		write_cr0(cr0);  		wbinvd(); -		if (use_intel()) -			/*  Save MTRR state */ +		if (use_intel()) { +			/* Save MTRR state */  			rdmsr(MSR_MTRRdefType, ctxt->deftype_lo, ctxt->deftype_hi); -		else -			/* Cyrix ARRs - everything else were excluded at the top */ +		} else { +			/* +			 * Cyrix ARRs - +			 * everything else were excluded at the top +			 */  			ctxt->ccr3 = getCx86(CX86_CCR3); +		}  	}  }  void set_mtrr_cache_disable(struct set_mtrr_context *ctxt)  { -	if (use_intel()) -		/*  Disable MTRRs, and set the default type to uncached  */ +	if (use_intel()) { +		/* Disable MTRRs, and set the default type to uncached */  		mtrr_wrmsr(MSR_MTRRdefType, ctxt->deftype_lo & 0xf300UL,  		      ctxt->deftype_hi); -	else if (is_cpu(CYRIX)) -		/* Cyrix ARRs - everything else were excluded at the top */ -		setCx86(CX86_CCR3, (ctxt->ccr3 & 0x0f) | 0x10); +	} else { +		if (is_cpu(CYRIX)) { +			/* Cyrix ARRs - everything else were excluded at the top */ +			setCx86(CX86_CCR3, (ctxt->ccr3 & 0x0f) | 0x10); +		} +	}  } -/*  Restore the processor after a set_mtrr_prepare  */ +/* Restore the processor after a set_mtrr_prepare */  void set_mtrr_done(struct set_mtrr_context *ctxt)  {  	if (use_intel() || is_cpu(CYRIX)) { -		/*  Flush caches and TLBs  */ +		/* Flush caches and TLBs */  		wbinvd(); -		/*  Restore MTRRdefType  */ -		if (use_intel()) +		/* Restore MTRRdefType */ +		if (use_intel()) {  			/* Intel (P6) standard MTRRs */ -			mtrr_wrmsr(MSR_MTRRdefType, ctxt->deftype_lo, ctxt->deftype_hi); -		else -			/* Cyrix ARRs - everything else was excluded at the top */ +			mtrr_wrmsr(MSR_MTRRdefType, ctxt->deftype_lo, +				   ctxt->deftype_hi); +		} else { +			/* +			 * Cyrix ARRs - +			 * everything else was excluded at the top +			 */  			setCx86(CX86_CCR3, ctxt->ccr3); +		} -		/*  Enable caches  */ +		/* Enable caches */  		write_cr0(read_cr0() & 0xbfffffff); -		/*  Restore value of CR4  */ +		/* Restore value of CR4 */  		if (cpu_has_pge)  			write_cr4(ctxt->cr4val);  	} -	/*  Re-enable interrupts locally (if enabled previously)  */ +	/* Re-enable interrupts locally (if enabled previously) */  	local_irq_restore(ctxt->flags);  } -  | 
