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| author | Alexandre Belloni <alexandre.belloni@free-electrons.com> | 2014-07-08 20:21:14 +0400 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@free-electrons.com> | 2014-07-15 16:52:10 +0400 |
| commit | 063de897c411af65cb113cb5fb9a0022f913460e (patch) | |
| tree | 95fbac9ca44a653d95f8d446ae4788b05e162b04 | |
| parent | 7171511eaec5bf23fb06078f59784a3a0626b38f (diff) | |
| download | linux-063de897c411af65cb113cb5fb9a0022f913460e.tar.xz | |
ARM: at91/dt: sama5d3: define mpddr clock and ramc clocks
Define the available clock for mprddr and take both mpddr_clk and ddrck in the
ram controller driver.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
| -rw-r--r-- | arch/arm/boot/dts/sama5d3.dtsi | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi index e0b15a6e8897..04c35ce1e33e 100644 --- a/arch/arm/boot/dts/sama5d3.dtsi +++ b/arch/arm/boot/dts/sama5d3.dtsi @@ -402,8 +402,10 @@ }; ramc0: ramc@ffffea00 { - compatible = "atmel,at91sam9g45-ddramc"; + compatible = "atmel,sama5d3-ddramc"; reg = <0xffffea00 0x200>; + clocks = <&ddrck>, <&mpddr_clk>; + clock-names = "ddrck", "mpddr"; }; dbgu: serial@ffffee00 { @@ -1170,6 +1172,11 @@ #clock-cells = <0>; reg = <48>; }; + + mpddr_clk: mpddr_clk { + #clock-cells = <0>; + reg = <49>; + }; }; }; |