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| author | Sebastian Ott <sebott@redhat.com> | 2025-06-05 13:36:12 +0300 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2025-06-05 16:28:01 +0300 |
| commit | 05ce38d489dbc96eb1dd700b287f949cb8cc0610 (patch) | |
| tree | 67fa70117d7323447d2793c0833be72170a84c77 | |
| parent | 050632ae6571d0f148fa0d4b90b6409a12645461 (diff) | |
| download | linux-05ce38d489dbc96eb1dd700b287f949cb8cc0610.tar.xz | |
KVM: arm64: selftests: Fix xVAL init in arch_timer_edge_cases
arch_timer_edge_cases hits the following assertion in < 10% of the test runs:
==== Test Assertion Failure ====
arm64/arch_timer_edge_cases.c:490: timer_get_cntct(timer) >= DEF_CNT + (timer_get_cntfrq() * (uint64_t)(delta_2_ms) / 1000)
pid=17110 tid=17110 errno=4 - Interrupted system call
1 0x0000000000404ec7: test_run at arch_timer_edge_cases.c:945
2 0x0000000000401fa3: main at arch_timer_edge_cases.c:1074
3 0x0000ffffa774b587: ?? ??:0
4 0x0000ffffa774b65f: ?? ??:0
5 0x000000000040206f: _start at ??:?
timer_get_cntct(timer) >= DEF_CNT + msec_to_cycles(delta_2_ms)
Enabling the timer without proper xval initialization in set_tval_irq()
resulted in an early interrupt during timer reprogramming. Make sure
to set the xval before setting the enable bit.
Signed-off-by: Sebastian Ott <sebott@redhat.com>
Link: https://lore.kernel.org/r/20250605103613.14544-4-sebott@redhat.com
Signed-off-by: Marc Zyngier <maz@kernel.org>
| -rw-r--r-- | tools/testing/selftests/kvm/arm64/arch_timer_edge_cases.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tools/testing/selftests/kvm/arm64/arch_timer_edge_cases.c b/tools/testing/selftests/kvm/arm64/arch_timer_edge_cases.c index a813b4c6c817..be8bbedc933b 100644 --- a/tools/testing/selftests/kvm/arm64/arch_timer_edge_cases.c +++ b/tools/testing/selftests/kvm/arm64/arch_timer_edge_cases.c @@ -191,8 +191,8 @@ static void set_tval_irq(enum arch_timer timer, uint64_t tval_cycles, { atomic_set(&shared_data.handled, 0); atomic_set(&shared_data.spurious, 0); - timer_set_ctl(timer, ctl); timer_set_tval(timer, tval_cycles); + timer_set_ctl(timer, ctl); } static void set_xval_irq(enum arch_timer timer, uint64_t xval, uint32_t ctl, |