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authorPaul Burton <paul.burton@imgtec.com>2014-02-14 13:21:30 +0400
committerPaul Burton <paul.burton@imgtec.com>2014-05-02 19:39:10 +0400
commit0467811e9bdb22c7a1595db4c230efd99265e3c7 (patch)
treed9546ca9126c6bf78895843bbaf787a576d3c3e8
parent74e91335190c628b870c69cff8360d23707b1f53 (diff)
downloadlinux-0467811e9bdb22c7a1595db4c230efd99265e3c7.tar.xz
MIPS: mark GIC clockevent device with CLOCK_EVT_FEAT_C3STOP
Although the GIC counter will continue when a core is in a low power state and it will still trigger interrupts, the core will be incapable of servicing those interrupts rendering them useless. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
-rw-r--r--arch/mips/kernel/cevt-gic.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/kernel/cevt-gic.c b/arch/mips/kernel/cevt-gic.c
index 594cbbf16d62..925bae559067 100644
--- a/arch/mips/kernel/cevt-gic.c
+++ b/arch/mips/kernel/cevt-gic.c
@@ -73,7 +73,8 @@ int gic_clockevent_init(void)
cd = &per_cpu(gic_clockevent_device, cpu);
cd->name = "MIPS GIC";
- cd->features = CLOCK_EVT_FEAT_ONESHOT;
+ cd->features = CLOCK_EVT_FEAT_ONESHOT |
+ CLOCK_EVT_FEAT_C3STOP;
clockevent_set_clock(cd, gic_frequency);