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| author | Ji Sheng Teoh <jisheng.teoh@starfivetech.com> | 2024-01-24 11:59:59 +0300 |
|---|---|---|
| committer | Ji Sheng Teoh <jisheng.teoh@starfivetech.com> | 2024-01-24 12:00:03 +0300 |
| commit | 0526efb53fc541ddc00bac2e5285f1459335d788 (patch) | |
| tree | ffc58abd1b8e0648ff606257efe566e40ba52025 | |
| parent | c0a8c322b65c1120f2872ee28072adfdd8d7ff0a (diff) | |
| download | linux-0526efb53fc541ddc00bac2e5285f1459335d788.tar.xz | |
riscv: dts: starfive: dubhe: Add zihintpause isa-extension
Add zihintpause isa-extension which is supported in Dubhe-80 and Dubhe-90
Signed-off-by: Ji Sheng Teoh <jisheng.teoh@starfivetech.com>
| -rwxr-xr-x | arch/riscv/boot/dts/starfive/dubhe.dtsi | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/riscv/boot/dts/starfive/dubhe.dtsi b/arch/riscv/boot/dts/starfive/dubhe.dtsi index d87f7ac08ea5..1eba9acfd644 100755 --- a/arch/riscv/boot/dts/starfive/dubhe.dtsi +++ b/arch/riscv/boot/dts/starfive/dubhe.dtsi @@ -20,7 +20,7 @@ riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "zba", "zbb", "zbc", "zbs", "zicntr", "zicsr", "zifencei", - "zihpm", "sscofpmf"; + "zihintpause", "zihpm", "sscofpmf"; tlb-split; cpu0_intc: interrupt-controller { @@ -39,7 +39,7 @@ riscv,isa-base = "rv64i"; riscv,isa-extensions = "i", "m", "a", "f", "d", "c", "h", "zba", "zbb", "zbc", "zbs", "zicntr", "zicsr", "zifencei", - "zihpm", "sscofpmf"; + "zihintpause", "zihpm", "sscofpmf"; tlb-split; cpu1_intc: interrupt-controller { |