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author | Atlas Luo <atlas.luo@starfivetech.com> | 2025-04-22 11:06:56 +0300 |
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committer | Atlas Luo <atlas.luo@starfivetech.com> | 2025-04-22 11:06:56 +0300 |
commit | e69287aeeeb5be7bface766c348649ef231507ee (patch) | |
tree | f2dd200488a30906252d95886cb67061f990565e | |
parent | e0ef35bfe6683a541b57a0b73a5b95c97e3f93c3 (diff) | |
parent | 4ad2061e28b0f424020bfa614e3e95c1cf6af935 (diff) | |
download | linux-JH7110_VisionFive2_6.12.y_devel.tar.xz |
Merge tag 'JH7110_SDK_6.12_v5.14.1' into vf2-6.12.y-develJH7110_VF2_6.12_v5.14.1JH7110_VisionFive2_6.12.y_devel
Update tag JH7110_SDK_6.12_v5.14.1
-rw-r--r-- | drivers/phy/starfive/phy-jh7110-usb.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/phy/starfive/phy-jh7110-usb.c b/drivers/phy/starfive/phy-jh7110-usb.c index 85111e330221..377f9dd372dc 100644 --- a/drivers/phy/starfive/phy-jh7110-usb.c +++ b/drivers/phy/starfive/phy-jh7110-usb.c @@ -18,6 +18,8 @@ #include <linux/usb/of.h> #define USB_125M_CLK_RATE 125000000 +#define USB_CLK_MODE_OFF 0x0 +#define USB_CLK_MODE_RX_NORMAL_PWR BIT(1) #define USB_LS_KEEPALIVE_OFF 0x4 #define USB_LS_KEEPALIVE_ENABLE BIT(4) @@ -78,6 +80,7 @@ static int jh7110_usb2_phy_init(struct phy *_phy) { struct jh7110_usb2_phy *phy = phy_get_drvdata(_phy); int ret; + unsigned int val; ret = clk_set_rate(phy->usb_125m_clk, USB_125M_CLK_RATE); if (ret) @@ -87,6 +90,10 @@ static int jh7110_usb2_phy_init(struct phy *_phy) if (ret) return ret; + val = readl(phy->regs + USB_CLK_MODE_OFF); + val |= USB_CLK_MODE_RX_NORMAL_PWR; + writel(val, phy->regs + USB_CLK_MODE_OFF); + return 0; } |