blob: 7aa49b9ba60d0e3e2db40b50bd38d86add41d2c3 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
|
/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
/*
* Copyright 2013-2016 Freescale Semiconductor Inc.
* Copyright 2016,2019-2020 NXP
*/
#ifndef VFIO_FSL_MC_PRIVATE_H
#define VFIO_FSL_MC_PRIVATE_H
#define VFIO_FSL_MC_OFFSET_SHIFT 40
#define VFIO_FSL_MC_OFFSET_MASK (((u64)(1) << VFIO_FSL_MC_OFFSET_SHIFT) - 1)
#define VFIO_FSL_MC_OFFSET_TO_INDEX(off) ((off) >> VFIO_FSL_MC_OFFSET_SHIFT)
#define VFIO_FSL_MC_INDEX_TO_OFFSET(index) \
((u64)(index) << VFIO_FSL_MC_OFFSET_SHIFT)
struct vfio_fsl_mc_irq {
u32 flags;
u32 count;
struct eventfd_ctx *trigger;
char *name;
};
struct vfio_fsl_mc_reflck {
struct kref kref;
struct mutex lock;
};
struct vfio_fsl_mc_region {
u32 flags;
u32 type;
u64 addr;
resource_size_t size;
};
struct vfio_fsl_mc_device {
struct fsl_mc_device *mc_dev;
struct notifier_block nb;
int refcnt;
struct vfio_fsl_mc_region *regions;
struct vfio_fsl_mc_reflck *reflck;
struct mutex igate;
struct vfio_fsl_mc_irq *mc_irqs;
};
extern int vfio_fsl_mc_set_irqs_ioctl(struct vfio_fsl_mc_device *vdev,
u32 flags, unsigned int index,
unsigned int start, unsigned int count,
void *data);
void vfio_fsl_mc_irqs_cleanup(struct vfio_fsl_mc_device *vdev);
#endif /* VFIO_FSL_MC_PRIVATE_H */
|
