1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
|
/*
* Fusb300 UDC (USB gadget)
*
* Copyright (C) 2010 Faraday Technology Corp.
*
* Author : Yuan-hsin Chen <yhchen@faraday-tech.com>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*/
#include <linux/dma-mapping.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/usb/ch9.h>
#include <linux/usb/gadget.h>
#include "fusb300_udc.h"
MODULE_DESCRIPTION("FUSB300 USB gadget driver");
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Yuan-Hsin Chen, Feng-Hsin Chiang <john453@faraday-tech.com>");
MODULE_ALIAS("platform:fusb300_udc");
#define DRIVER_VERSION "20 October 2010"
static const char udc_name[] = "fusb300_udc";
static const char * const fusb300_ep_name[] = {
"ep0", "ep1", "ep2", "ep3", "ep4", "ep5", "ep6", "ep7", "ep8", "ep9",
"ep10", "ep11", "ep12", "ep13", "ep14", "ep15"
};
static void done(struct fusb300_ep *ep, struct fusb300_request *req,
int status);
static void fusb300_enable_bit(struct fusb300 *fusb300, u32 offset,
u32 value)
{
u32 reg = ioread32(fusb300->reg + offset);
reg |= value;
iowrite32(reg, fusb300->reg + offset);
}
static void fusb300_disable_bit(struct fusb300 *fusb300, u32 offset,
u32 value)
{
u32 reg = ioread32(fusb300->reg + offset);
reg &= ~value;
iowrite32(reg, fusb300->reg + offset);
}
static void fusb300_ep_setting(struct fusb300_ep *ep,
struct fusb300_ep_info info)
{
ep->epnum = info.epnum;
ep->type = info.type;
}
static int fusb300_ep_release(struct fusb300_ep *ep)
{
if (!ep->epnum)
return 0;
ep->epnum = 0;
ep->stall = 0;
ep->wedged = 0;
return 0;
}
static void fusb300_set_fifo_entry(struct fusb300 *fusb300,
u32 ep)
{
u32 val = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
val &= ~FUSB300_EPSET1_FIFOENTRY_MSK;
val |= FUSB300_EPSET1_FIFOENTRY(FUSB300_FIFO_ENTRY_NUM);
iowrite32(val, fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
}
static void fusb300_set_start_entry(struct fusb300 *fusb300,
u8 ep)
{
u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
u32 start_entry = fusb300->fifo_entry_num * FUSB300_FIFO_ENTRY_NUM;
reg &= ~FUSB300_EPSET1_START_ENTRY_MSK ;
reg |= FUSB300_EPSET1_START_ENTRY(start_entry);
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
if (fusb300->fifo_entry_num == FUSB300_MAX_FIFO_ENTRY) {
fusb300->fifo_entry_num = 0;
fusb300->addrofs = 0;
pr_err("fifo entry is over the maximum number!\n");
} else
fusb300->fifo_entry_num++;
}
/* set fusb300_set_start_entry first before fusb300_set_epaddrofs */
static void fusb300_set_epaddrofs(struct fusb300 *fusb300,
struct fusb300_ep_info info)
{
u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
reg &= ~FUSB300_EPSET2_ADDROFS_MSK;
reg |= FUSB300_EPSET2_ADDROFS(fusb300->addrofs);
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
fusb300->addrofs += (info.maxpacket + 7) / 8 * FUSB300_FIFO_ENTRY_NUM;
}
static void ep_fifo_setting(struct fusb300 *fusb300,
struct fusb300_ep_info info)
{
fusb300_set_fifo_entry(fusb300, info.epnum);
fusb300_set_start_entry(fusb300, info.epnum);
fusb300_set_epaddrofs(fusb300, info);
}
static void fusb300_set_eptype(struct fusb300 *fusb300,
struct fusb300_ep_info info)
{
u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
reg &= ~FUSB300_EPSET1_TYPE_MSK;
reg |= FUSB300_EPSET1_TYPE(info.type);
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
}
static void fusb300_set_epdir(struct fusb300 *fusb300,
struct fusb300_ep_info info)
{
u32 reg;
if (!info.dir_in)
return;
reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
reg &= ~FUSB300_EPSET1_DIR_MSK;
reg |= FUSB300_EPSET1_DIRIN;
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
}
static void fusb300_set_ep_active(struct fusb300 *fusb300,
u8 ep)
{
u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
reg |= FUSB300_EPSET1_ACTEN;
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(ep));
}
static void fusb300_set_epmps(struct fusb300 *fusb300,
struct fusb300_ep_info info)
{
u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
reg &= ~FUSB300_EPSET2_MPS_MSK;
reg |= FUSB300_EPSET2_MPS(info.maxpacket);
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET2(info.epnum));
}
static void fusb300_set_interval(struct fusb300 *fusb300,
struct fusb300_ep_info info)
{
u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
reg &= ~FUSB300_EPSET1_INTERVAL(0x7);
reg |= FUSB300_EPSET1_INTERVAL(info.interval);
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
}
static void fusb300_set_bwnum(struct fusb300 *fusb300,
struct fusb300_ep_info info)
{
u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
reg &= ~FUSB300_EPSET1_BWNUM(0x3);
reg |= FUSB300_EPSET1_BWNUM(info.bw_num);
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET1(info.epnum));
}
static void set_ep_reg(struct fusb300 *fusb300,
struct fusb300_ep_info info)
{
fusb300_set_eptype(fusb300, info);
fusb300_set_epdir(fusb300, info);
fusb300_set_epmps(fusb300, info);
if (info.interval)
fusb300_set_interval(fusb300, info);
if (info.bw_num)
fusb300_set_bwnum(fusb300, info);
fusb300_set_ep_active(fusb300, info.epnum);
}
static int config_ep(struct fusb300_ep *ep,
const struct usb_endpoint_descriptor *desc)
{
struct fusb300 *fusb300 = ep->fusb300;
struct fusb300_ep_info info;
ep->ep.desc = desc;
info.interval = 0;
info.addrofs = 0;
info.bw_num = 0;
info.type = desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
info.dir_in = (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) ? 1 : 0;
info.maxpacket = usb_endpoint_maxp(desc);
info.epnum = desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK;
if ((info.type == USB_ENDPOINT_XFER_INT) ||
(info.type == USB_ENDPOINT_XFER_ISOC)) {
info.interval = desc->bInterval;
if (info.type == USB_ENDPOINT_XFER_ISOC)
info.bw_num = ((desc->wMaxPacketSize & 0x1800) >> 11);
}
ep_fifo_setting(fusb300, info);
set_ep_reg(fusb300, info);
fusb300_ep_setting(ep, info);
fusb300->ep[info.epnum] = ep;
return 0;
}
static int fusb300_enable(struct usb_ep *_ep,
const struct usb_endpoint_descriptor *desc)
{
struct fusb300_ep *ep;
ep = container_of(_ep, struct fusb300_ep, ep);
if (ep->fusb300->reenum) {
ep->fusb300->fifo_entry_num = 0;
ep->fusb300->addrofs = 0;
ep->fusb300->reenum = 0;
}
return config_ep(ep, desc);
}
static int fusb300_disable(struct usb_ep *_ep)
{
struct fusb300_ep *ep;
struct fusb300_request *req;
unsigned long flags;
ep = container_of(_ep, struct fusb300_ep, ep);
BUG_ON(!ep);
while (!list_empty(&ep->queue)) {
req = list_entry(ep->queue.next, struct fusb300_request, queue);
spin_lock_irqsave(&ep->fusb300->lock, flags);
done(ep, req, -ECONNRESET);
spin_unlock_irqrestore(&ep->fusb300->lock, flags);
}
return fusb300_ep_release(ep);
}
static struct usb_request *fusb300_alloc_request(struct usb_ep *_ep,
gfp_t gfp_flags)
{
struct fusb300_request *req;
req = kzalloc(sizeof(struct fusb300_request), gfp_flags);
if (!req)
return NULL;
INIT_LIST_HEAD(&req->queue);
return &req->req;
}
static void fusb300_free_request(struct usb_ep *_ep, struct usb_request *_req)
{
struct fusb300_request *req;
req = container_of(_req, struct fusb300_request, req);
kfree(req);
}
static int enable_fifo_int(struct fusb300_ep *ep)
{
struct fusb300 *fusb300 = ep->fusb300;
if (ep->epnum) {
fusb300_enable_bit(fusb300, FUSB300_OFFSET_IGER0,
FUSB300_IGER0_EEPn_FIFO_INT(ep->epnum));
} else {
pr_err("can't enable_fifo_int ep0\n");
return -EINVAL;
}
return 0;
}
static int disable_fifo_int(struct fusb300_ep *ep)
{
struct fusb300 *fusb300 = ep->fusb300;
if (ep->epnum) {
fusb300_disable_bit(fusb300, FUSB300_OFFSET_IGER0,
FUSB300_IGER0_EEPn_FIFO_INT(ep->epnum));
} else {
pr_err("can't disable_fifo_int ep0\n");
return -EINVAL;
}
return 0;
}
static void fusb300_set_cxlen(struct fusb300 *fusb300, u32 length)
{
u32 reg;
reg = ioread32(fusb300->reg + FUSB300_OFFSET_CSR);
reg &= ~FUSB300_CSR_LEN_MSK;
reg |= FUSB300_CSR_LEN(length);
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_CSR);
}
/* write data to cx fifo */
static void fusb300_wrcxf(struct fusb300_ep *ep,
struct fusb300_request *req)
{
int i = 0;
u8 *tmp;
u32 data;
struct fusb300 *fusb300 = ep->fusb300;
u32 length = req->req.length - req->req.actual;
tmp = req->req.buf + req->req.actual;
if (length > SS_CTL_MAX_PACKET_SIZE) {
fusb300_set_cxlen(fusb300, SS_CTL_MAX_PACKET_SIZE);
for (i = (SS_CTL_MAX_PACKET_SIZE >> 2); i > 0; i--) {
data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16 |
*(tmp + 3) << 24;
iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
tmp += 4;
}
req->req.actual += SS_CTL_MAX_PACKET_SIZE;
} else { /* length is less than max packet size */
fusb300_set_cxlen(fusb300, length);
for (i = length >> 2; i > 0; i--) {
data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16 |
*(tmp + 3) << 24;
printk(KERN_DEBUG " 0x%x\n", data);
iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
tmp = tmp + 4;
}
switch (length % 4) {
case 1:
data = *tmp;
printk(KERN_DEBUG " 0x%x\n", data);
iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
break;
case 2:
data = *tmp | *(tmp + 1) << 8;
printk(KERN_DEBUG " 0x%x\n", data);
iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
break;
case 3:
data = *tmp | *(tmp + 1) << 8 | *(tmp + 2) << 16;
printk(KERN_DEBUG " 0x%x\n", data);
iowrite32(data, fusb300->reg + FUSB300_OFFSET_CXPORT);
break;
default:
break;
}
req->req.actual += length;
}
}
static void fusb300_set_epnstall(struct fusb300 *fusb300, u8 ep)
{
fusb300_enable_bit(fusb300, FUSB300_OFFSET_EPSET0(ep),
FUSB300_EPSET0_STL);
}
static void fusb300_clear_epnstall(struct fusb300 *fusb300, u8 ep)
{
u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET0(ep));
if (reg & FUSB300_EPSET0_STL) {
printk(KERN_DEBUG "EP%d stall... Clear!!\n", ep);
reg |= FUSB300_EPSET0_STL_CLR;
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_EPSET0(ep));
}
}
static void ep0_queue(struct fusb300_ep *ep, struct fusb300_request *req)
{
if (ep->fusb300->ep0_dir) { /* if IN */
if (req->req.length) {
fusb300_wrcxf(ep, req);
} else
printk(KERN_DEBUG "%s : req->req.length = 0x%x\n",
__func__, req->req.length);
if ((req->req.length == req->req.actual) ||
(req->req.actual < ep->ep.maxpacket))
done(ep, req, 0);
} else { /* OUT */
if (!req->req.length)
done(ep, req, 0);
else
fusb300_enable_bit(ep->fusb300, FUSB300_OFFSET_IGER1,
FUSB300_IGER1_CX_OUT_INT);
}
}
static int fusb300_queue(struct usb_ep *_ep, struct usb_request *_req,
gfp_t gfp_flags)
{
struct fusb300_ep *ep;
struct fusb300_request *req;
unsigned long flags;
int request = 0;
ep = container_of(_ep, struct fusb300_ep, ep);
req = container_of(_req, struct fusb300_request, req);
if (ep->fusb300->gadget.speed == USB_SPEED_UNKNOWN)
return -ESHUTDOWN;
spin_lock_irqsave(&ep->fusb300->lock, flags);
if (list_empty(&ep->queue))
request = 1;
list_add_tail(&req->queue, &ep->queue);
req->req.actual = 0;
req->req.status = -EINPROGRESS;
if (ep->ep.desc == NULL) /* ep0 */
ep0_queue(ep, req);
else if (request && !ep->stall)
enable_fifo_int(ep);
spin_unlock_irqrestore(&ep->fusb300->lock, flags);
return 0;
}
static int fusb300_dequeue(struct usb_ep *_ep, struct usb_request *_req)
{
struct fusb300_ep *ep;
struct fusb300_request *req;
unsigned long flags;
ep = container_of(_ep, struct fusb300_ep, ep);
req = container_of(_req, struct fusb300_request, req);
spin_lock_irqsave(&ep->fusb300->lock, flags);
if (!list_empty(&ep->queue))
done(ep, req, -ECONNRESET);
spin_unlock_irqrestore(&ep->fusb300->lock, flags);
return 0;
}
static int fusb300_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedge)
{
struct fusb300_ep *ep;
struct fusb300 *fusb300;
unsigned long flags;
int ret = 0;
ep = container_of(_ep, struct fusb300_ep, ep);
fusb300 = ep->fusb300;
spin_lock_irqsave(&ep->fusb300->lock, flags);
if (!list_empty(&ep->queue)) {
ret = -EAGAIN;
goto out;
}
if (value) {
fusb300_set_epnstall(fusb300, ep->epnum);
ep->stall = 1;
if (wedge)
ep->wedged = 1;
} else {
fusb300_clear_epnstall(fusb300, ep->epnum);
ep->stall = 0;
ep->wedged = 0;
}
out:
spin_unlock_irqrestore(&ep->fusb300->lock, flags);
return ret;
}
static int fusb300_set_halt(struct usb_ep *_ep, int value)
{
return fusb300_set_halt_and_wedge(_ep, value, 0);
}
static int fusb300_set_wedge(struct usb_ep *_ep)
{
return fusb300_set_halt_and_wedge(_ep, 1, 1);
}
static void fusb300_fifo_flush(struct usb_ep *_ep)
{
}
static struct usb_ep_ops fusb300_ep_ops = {
.enable = fusb300_enable,
.disable = fusb300_disable,
.alloc_request = fusb300_alloc_request,
.free_request = fusb300_free_request,
.queue = fusb300_queue,
.dequeue = fusb300_dequeue,
.set_halt = fusb300_set_halt,
.fifo_flush = fusb300_fifo_flush,
.set_wedge = fusb300_set_wedge,
};
/*****************************************************************************/
static void fusb300_clear_int(struct fusb300 *fusb300, u32 offset,
u32 value)
{
iowrite32(value, fusb300->reg + offset);
}
static void fusb300_reset(void)
{
}
static void fusb300_set_cxstall(struct fusb300 *fusb300)
{
fusb300_enable_bit(fusb300, FUSB300_OFFSET_CSR,
FUSB300_CSR_STL);
}
static void fusb300_set_cxdone(struct fusb300 *fusb300)
{
fusb300_enable_bit(fusb300, FUSB300_OFFSET_CSR,
FUSB300_CSR_DONE);
}
/* read data from cx fifo */
static void fusb300_rdcxf(struct fusb300 *fusb300,
u8 *buffer, u32 length)
{
int i = 0;
u8 *tmp;
u32 data;
tmp = buffer;
for (i = (length >> 2); i > 0; i--) {
data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
printk(KERN_DEBUG " 0x%x\n", data);
*tmp = data & 0xFF;
*(tmp + 1) = (data >> 8) & 0xFF;
*(tmp + 2) = (data >> 16) & 0xFF;
*(tmp + 3) = (data >> 24) & 0xFF;
tmp = tmp + 4;
}
switch (length % 4) {
case 1:
data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
printk(KERN_DEBUG " 0x%x\n", data);
*tmp = data & 0xFF;
break;
case 2:
data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
printk(KERN_DEBUG " 0x%x\n", data);
*tmp = data & 0xFF;
*(tmp + 1) = (data >> 8) & 0xFF;
break;
case 3:
data = ioread32(fusb300->reg + FUSB300_OFFSET_CXPORT);
printk(KERN_DEBUG " 0x%x\n", data);
*tmp = data & 0xFF;
*(tmp + 1) = (data >> 8) & 0xFF;
*(tmp + 2) = (data >> 16) & 0xFF;
break;
default:
break;
}
}
static void fusb300_rdfifo(struct fusb300_ep *ep,
struct fusb300_request *req,
u32 length)
{
int i = 0;
u8 *tmp;
u32 data, reg;
struct fusb300 *fusb300 = ep->fusb300;
tmp = req->req.buf + req->req.actual;
req->req.actual += length;
if (req->req.actual > req->req.length)
printk(KERN_DEBUG "req->req.actual > req->req.length\n");
for (i = (length >> 2); i > 0; i--) {
data = ioread32(fusb300->reg +
FUSB300_OFFSET_EPPORT(ep->epnum));
*tmp = data & 0xFF;
*(tmp + 1) = (data >> 8) & 0xFF;
*(tmp + 2) = (data >> 16) & 0xFF;
*(tmp + 3) = (data >> 24) & 0xFF;
tmp = tmp + 4;
}
switch (length % 4) {
case 1:
data = ioread32(fusb300->reg +
FUSB300_OFFSET_EPPORT(ep->epnum));
*tmp = data & 0xFF;
break;
case 2:
data = ioread32(fusb300->reg +
FUSB300_OFFSET_EPPORT(ep->epnum));
*tmp = data & 0xFF;
*(tmp + 1) = (data >> 8) & 0xFF;
break;
case 3:
data = ioread32(fusb300->reg +
FUSB300_OFFSET_EPPORT(ep->epnum));
*tmp = data & 0xFF;
*(tmp + 1) = (data >> 8) & 0xFF;
*(tmp + 2) = (data >> 16) & 0xFF;
break;
default:
break;
}
do {
reg = ioread32(fusb300->reg + FUSB300_OFFSET_IGR1);
reg &= FUSB300_IGR1_SYNF0_EMPTY_INT;
if (i)
printk(KERN_INFO "sync fifo is not empty!\n");
i++;
} while (!reg);
}
static u8 fusb300_get_epnstall(struct fusb300 *fusb300, u8 ep)
{
u8 value;
u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPSET0(ep));
value = reg & FUSB300_EPSET0_STL;
return value;
}
static u8 fusb300_get_cxstall(struct fusb300 *fusb300)
{
u8 value;
u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_CSR);
value = (reg & FUSB300_CSR_STL) >> 1;
return value;
}
static void request_error(struct fusb300 *fusb300)
{
fusb300_set_cxstall(fusb300);
printk(KERN_DEBUG "request error!!\n");
}
static void get_status(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
__releases(fusb300->lock)
__acquires(fusb300->lock)
{
u8 ep;
u16 status = 0;
u16 w_index = ctrl->wIndex;
switch (ctrl->bRequestType & USB_RECIP_MASK) {
case USB_RECIP_DEVICE:
status = 1 << USB_DEVICE_SELF_POWERED;
break;
case USB_RECIP_INTERFACE:
status = 0;
break;
case USB_RECIP_ENDPOINT:
ep = w_index & USB_ENDPOINT_NUMBER_MASK;
if (ep) {
if (fusb300_get_epnstall(fusb300, ep))
status = 1 << USB_ENDPOINT_HALT;
} else {
if (fusb300_get_cxstall(fusb300))
status = 0;
}
break;
default:
request_error(fusb300);
return; /* exit */
}
fusb300->ep0_data = cpu_to_le16(status);
fusb300->ep0_req->buf = &fusb300->ep0_data;
fusb300->ep0_req->length = 2;
spin_unlock(&fusb300->lock);
fusb300_queue(fusb300->gadget.ep0, fusb300->ep0_req, GFP_KERNEL);
spin_lock(&fusb300->lock);
}
static void set_feature(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
{
u8 ep;
switch (ctrl->bRequestType & USB_RECIP_MASK) {
case USB_RECIP_DEVICE:
fusb300_set_cxdone(fusb300);
break;
case USB_RECIP_INTERFACE:
fusb300_set_cxdone(fusb300);
break;
case USB_RECIP_ENDPOINT: {
u16 w_index = le16_to_cpu(ctrl->wIndex);
ep = w_index & USB_ENDPOINT_NUMBER_MASK;
if (ep)
fusb300_set_epnstall(fusb300, ep);
else
fusb300_set_cxstall(fusb300);
fusb300_set_cxdone(fusb300);
}
break;
default:
request_error(fusb300);
break;
}
}
static void fusb300_clear_seqnum(struct fusb300 *fusb300, u8 ep)
{
fusb300_enable_bit(fusb300, FUSB300_OFFSET_EPSET0(ep),
FUSB300_EPSET0_CLRSEQNUM);
}
static void clear_feature(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
{
struct fusb300_ep *ep =
fusb300->ep[ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK];
switch (ctrl->bRequestType & USB_RECIP_MASK) {
case USB_RECIP_DEVICE:
fusb300_set_cxdone(fusb300);
break;
case USB_RECIP_INTERFACE:
fusb300_set_cxdone(fusb300);
break;
case USB_RECIP_ENDPOINT:
if (ctrl->wIndex & USB_ENDPOINT_NUMBER_MASK) {
if (ep->wedged) {
fusb300_set_cxdone(fusb300);
break;
}
if (ep->stall) {
ep->stall = 0;
fusb300_clear_seqnum(fusb300, ep->epnum);
fusb300_clear_epnstall(fusb300, ep->epnum);
if (!list_empty(&ep->queue))
enable_fifo_int(ep);
}
}
fusb300_set_cxdone(fusb300);
break;
default:
request_error(fusb300);
break;
}
}
static void fusb300_set_dev_addr(struct fusb300 *fusb300, u16 addr)
{
u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_DAR);
reg &= ~FUSB300_DAR_DRVADDR_MSK;
reg |= FUSB300_DAR_DRVADDR(addr);
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_DAR);
}
static void set_address(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
{
if (ctrl->wValue >= 0x0100)
request_error(fusb300);
else {
fusb300_set_dev_addr(fusb300, ctrl->wValue);
fusb300_set_cxdone(fusb300);
}
}
#define UVC_COPY_DESCRIPTORS(mem, src) \
do { \
const struct usb_descriptor_header * const *__src; \
for (__src = src; *__src; ++__src) { \
memcpy(mem, *__src, (*__src)->bLength); \
mem += (*__src)->bLength; \
} \
} while (0)
static int setup_packet(struct fusb300 *fusb300, struct usb_ctrlrequest *ctrl)
{
u8 *p = (u8 *)ctrl;
u8 ret = 0;
u8 i = 0;
fusb300_rdcxf(fusb300, p, 8);
fusb300->ep0_dir = ctrl->bRequestType & USB_DIR_IN;
fusb300->ep0_length = ctrl->wLength;
/* check request */
if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) {
switch (ctrl->bRequest) {
case USB_REQ_GET_STATUS:
get_status(fusb300, ctrl);
break;
case USB_REQ_CLEAR_FEATURE:
clear_feature(fusb300, ctrl);
break;
case USB_REQ_SET_FEATURE:
set_feature(fusb300, ctrl);
break;
case USB_REQ_SET_ADDRESS:
set_address(fusb300, ctrl);
break;
case USB_REQ_SET_CONFIGURATION:
fusb300_enable_bit(fusb300, FUSB300_OFFSET_DAR,
FUSB300_DAR_SETCONFG);
/* clear sequence number */
for (i = 1; i <= FUSB300_MAX_NUM_EP; i++)
fusb300_clear_seqnum(fusb300, i);
fusb300->reenum = 1;
ret = 1;
break;
default:
ret = 1;
break;
}
} else
ret = 1;
return ret;
}
static void done(struct fusb300_ep *ep, struct fusb300_request *req,
int status)
{
list_del_init(&req->queue);
/* don't modify queue heads during completion callback */
if (ep->fusb300->gadget.speed == USB_SPEED_UNKNOWN)
req->req.status = -ESHUTDOWN;
else
req->req.status = status;
spin_unlock(&ep->fusb300->lock);
req->req.complete(&ep->ep, &req->req);
spin_lock(&ep->fusb300->lock);
if (ep->epnum) {
disable_fifo_int(ep);
if (!list_empty(&ep->queue))
enable_fifo_int(ep);
} else
fusb300_set_cxdone(ep->fusb300);
}
static void fusb300_fill_idma_prdtbl(struct fusb300_ep *ep, dma_addr_t d,
u32 len)
{
u32 value;
u32 reg;
/* wait SW owner */
do {
reg = ioread32(ep->fusb300->reg +
FUSB300_OFFSET_EPPRD_W0(ep->epnum));
reg &= FUSB300_EPPRD0_H;
} while (reg);
iowrite32(d, ep->fusb300->reg + FUSB300_OFFSET_EPPRD_W1(ep->epnum));
value = FUSB300_EPPRD0_BTC(len) | FUSB300_EPPRD0_H |
FUSB300_EPPRD0_F | FUSB300_EPPRD0_L | FUSB300_EPPRD0_I;
iowrite32(value, ep->fusb300->reg + FUSB300_OFFSET_EPPRD_W0(ep->epnum));
iowrite32(0x0, ep->fusb300->reg + FUSB300_OFFSET_EPPRD_W2(ep->epnum));
fusb300_enable_bit(ep->fusb300, FUSB300_OFFSET_EPPRDRDY,
FUSB300_EPPRDR_EP_PRD_RDY(ep->epnum));
}
static void fusb300_wait_idma_finished(struct fusb300_ep *ep)
{
u32 reg;
do {
reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_IGR1);
if ((reg & FUSB300_IGR1_VBUS_CHG_INT) ||
(reg & FUSB300_IGR1_WARM_RST_INT) ||
(reg & FUSB300_IGR1_HOT_RST_INT) ||
(reg & FUSB300_IGR1_USBRST_INT)
)
goto IDMA_RESET;
reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_IGR0);
reg &= FUSB300_IGR0_EPn_PRD_INT(ep->epnum);
} while (!reg);
fusb300_clear_int(ep->fusb300, FUSB300_OFFSET_IGR0,
FUSB300_IGR0_EPn_PRD_INT(ep->epnum));
return;
IDMA_RESET:
reg = ioread32(ep->fusb300->reg + FUSB300_OFFSET_IGER0);
reg &= ~FUSB300_IGER0_EEPn_PRD_INT(ep->epnum);
iowrite32(reg, ep->fusb300->reg + FUSB300_OFFSET_IGER0);
}
static void fusb300_set_idma(struct fusb300_ep *ep,
struct fusb300_request *req)
{
int ret;
ret = usb_gadget_map_request(&ep->fusb300->gadget,
&req->req, DMA_TO_DEVICE);
if (ret)
return;
fusb300_enable_bit(ep->fusb300, FUSB300_OFFSET_IGER0,
FUSB300_IGER0_EEPn_PRD_INT(ep->epnum));
fusb300_fill_idma_prdtbl(ep, req->req.dma, req->req.length);
/* check idma is done */
fusb300_wait_idma_finished(ep);
usb_gadget_unmap_request(&ep->fusb300->gadget,
&req->req, DMA_TO_DEVICE);
}
static void in_ep_fifo_handler(struct fusb300_ep *ep)
{
struct fusb300_request *req = list_entry(ep->queue.next,
struct fusb300_request, queue);
if (req->req.length)
fusb300_set_idma(ep, req);
done(ep, req, 0);
}
static void out_ep_fifo_handler(struct fusb300_ep *ep)
{
struct fusb300 *fusb300 = ep->fusb300;
struct fusb300_request *req = list_entry(ep->queue.next,
struct fusb300_request, queue);
u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_EPFFR(ep->epnum));
u32 length = reg & FUSB300_FFR_BYCNT;
fusb300_rdfifo(ep, req, length);
/* finish out transfer */
if ((req->req.length == req->req.actual) || (length < ep->ep.maxpacket))
done(ep, req, 0);
}
static void check_device_mode(struct fusb300 *fusb300)
{
u32 reg = ioread32(fusb300->reg + FUSB300_OFFSET_GCR);
switch (reg & FUSB300_GCR_DEVEN_MSK) {
case FUSB300_GCR_DEVEN_SS:
fusb300->gadget.speed = USB_SPEED_SUPER;
break;
case FUSB300_GCR_DEVEN_HS:
fusb300->gadget.speed = USB_SPEED_HIGH;
break;
case FUSB300_GCR_DEVEN_FS:
fusb300->gadget.speed = USB_SPEED_FULL;
break;
default:
fusb300->gadget.speed = USB_SPEED_UNKNOWN;
break;
}
printk(KERN_INFO "dev_mode = %d\n", (reg & FUSB300_GCR_DEVEN_MSK));
}
static void fusb300_ep0out(struct fusb300 *fusb300)
{
struct fusb300_ep *ep = fusb300->ep[0];
u32 reg;
if (!list_empty(&ep->queue)) {
struct fusb300_request *req;
req = list_first_entry(&ep->queue,
struct fusb300_request, queue);
if (req->req.length)
fusb300_rdcxf(ep->fusb300, req->req.buf,
req->req.length);
done(ep, req, 0);
reg = ioread32(fusb300->reg + FUSB300_OFFSET_IGER1);
reg &= ~FUSB300_IGER1_CX_OUT_INT;
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_IGER1);
} else
pr_err("%s : empty queue\n", __func__);
}
static void fusb300_ep0in(struct fusb300 *fusb300)
{
struct fusb300_request *req;
struct fusb300_ep *ep = fusb300->ep[0];
if ((!list_empty(&ep->queue)) && (fusb300->ep0_dir)) {
req = list_entry(ep->queue.next,
struct fusb300_request, queue);
if (req->req.length)
fusb300_wrcxf(ep, req);
if ((req->req.length - req->req.actual) < ep->ep.maxpacket)
done(ep, req, 0);
} else
fusb300_set_cxdone(fusb300);
}
static void fusb300_grp2_handler(void)
{
}
static void fusb300_grp3_handler(void)
{
}
static void fusb300_grp4_handler(void)
{
}
static void fusb300_grp5_handler(void)
{
}
static irqreturn_t fusb300_irq(int irq, void *_fusb300)
{
struct fusb300 *fusb300 = _fusb300;
u32 int_grp1 = ioread32(fusb300->reg + FUSB300_OFFSET_IGR1);
u32 int_grp1_en = ioread32(fusb300->reg + FUSB300_OFFSET_IGER1);
u32 int_grp0 = ioread32(fusb300->reg + FUSB300_OFFSET_IGR0);
u32 int_grp0_en = ioread32(fusb300->reg + FUSB300_OFFSET_IGER0);
struct usb_ctrlrequest ctrl;
u8 in;
u32 reg;
int i;
spin_lock(&fusb300->lock);
int_grp1 &= int_grp1_en;
int_grp0 &= int_grp0_en;
if (int_grp1 & FUSB300_IGR1_WARM_RST_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_WARM_RST_INT);
printk(KERN_INFO"fusb300_warmreset\n");
fusb300_reset();
}
if (int_grp1 & FUSB300_IGR1_HOT_RST_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_HOT_RST_INT);
printk(KERN_INFO"fusb300_hotreset\n");
fusb300_reset();
}
if (int_grp1 & FUSB300_IGR1_USBRST_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_USBRST_INT);
fusb300_reset();
}
/* COMABT_INT has a highest priority */
if (int_grp1 & FUSB300_IGR1_CX_COMABT_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_CX_COMABT_INT);
printk(KERN_INFO"fusb300_ep0abt\n");
}
if (int_grp1 & FUSB300_IGR1_VBUS_CHG_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_VBUS_CHG_INT);
printk(KERN_INFO"fusb300_vbus_change\n");
}
if (int_grp1 & FUSB300_IGR1_U3_EXIT_FAIL_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_U3_EXIT_FAIL_INT);
}
if (int_grp1 & FUSB300_IGR1_U2_EXIT_FAIL_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_U2_EXIT_FAIL_INT);
}
if (int_grp1 & FUSB300_IGR1_U1_EXIT_FAIL_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_U1_EXIT_FAIL_INT);
}
if (int_grp1 & FUSB300_IGR1_U2_ENTRY_FAIL_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_U2_ENTRY_FAIL_INT);
}
if (int_grp1 & FUSB300_IGR1_U1_ENTRY_FAIL_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_U1_ENTRY_FAIL_INT);
}
if (int_grp1 & FUSB300_IGR1_U3_EXIT_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_U3_EXIT_INT);
printk(KERN_INFO "FUSB300_IGR1_U3_EXIT_INT\n");
}
if (int_grp1 & FUSB300_IGR1_U2_EXIT_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_U2_EXIT_INT);
printk(KERN_INFO "FUSB300_IGR1_U2_EXIT_INT\n");
}
if (int_grp1 & FUSB300_IGR1_U1_EXIT_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_U1_EXIT_INT);
printk(KERN_INFO "FUSB300_IGR1_U1_EXIT_INT\n");
}
if (int_grp1 & FUSB300_IGR1_U3_ENTRY_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_U3_ENTRY_INT);
printk(KERN_INFO "FUSB300_IGR1_U3_ENTRY_INT\n");
fusb300_enable_bit(fusb300, FUSB300_OFFSET_SSCR1,
FUSB300_SSCR1_GO_U3_DONE);
}
if (int_grp1 & FUSB300_IGR1_U2_ENTRY_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_U2_ENTRY_INT);
printk(KERN_INFO "FUSB300_IGR1_U2_ENTRY_INT\n");
}
if (int_grp1 & FUSB300_IGR1_U1_ENTRY_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_U1_ENTRY_INT);
printk(KERN_INFO "FUSB300_IGR1_U1_ENTRY_INT\n");
}
if (int_grp1 & FUSB300_IGR1_RESM_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_RESM_INT);
printk(KERN_INFO "fusb300_resume\n");
}
if (int_grp1 & FUSB300_IGR1_SUSP_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_SUSP_INT);
printk(KERN_INFO "fusb300_suspend\n");
}
if (int_grp1 & FUSB300_IGR1_HS_LPM_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_HS_LPM_INT);
printk(KERN_INFO "fusb300_HS_LPM_INT\n");
}
if (int_grp1 & FUSB300_IGR1_DEV_MODE_CHG_INT) {
fusb300_clear_int(fusb300, FUSB300_OFFSET_IGR1,
FUSB300_IGR1_DEV_MODE_CHG_INT);
check_device_mode(fusb300);
}
if (int_grp1 & FUSB300_IGR1_CX_COMFAIL_INT) {
fusb300_set_cxstall(fusb300);
printk(KERN_INFO "fusb300_ep0fail\n");
}
if (int_grp1 & FUSB300_IGR1_CX_SETUP_INT) {
printk(KERN_INFO "fusb300_ep0setup\n");
if (setup_packet(fusb300, &ctrl)) {
spin_unlock(&fusb300->lock);
if (fusb300->driver->setup(&fusb300->gadget, &ctrl) < 0)
fusb300_set_cxstall(fusb300);
spin_lock(&fusb300->lock);
}
}
if (int_grp1 & FUSB300_IGR1_CX_CMDEND_INT)
printk(KERN_INFO "fusb300_cmdend\n");
if (int_grp1 & FUSB300_IGR1_CX_OUT_INT) {
printk(KERN_INFO "fusb300_cxout\n");
fusb300_ep0out(fusb300);
}
if (int_grp1 & FUSB300_IGR1_CX_IN_INT) {
printk(KERN_INFO "fusb300_cxin\n");
fusb300_ep0in(fusb300);
}
if (int_grp1 & FUSB300_IGR1_INTGRP5)
fusb300_grp5_handler();
if (int_grp1 & FUSB300_IGR1_INTGRP4)
fusb300_grp4_handler();
if (int_grp1 & FUSB300_IGR1_INTGRP3)
fusb300_grp3_handler();
if (int_grp1 & FUSB300_IGR1_INTGRP2)
fusb300_grp2_handler();
if (int_grp0) {
for (i = 1; i < FUSB300_MAX_NUM_EP; i++) {
if (int_grp0 & FUSB300_IGR0_EPn_FIFO_INT(i)) {
reg = ioread32(fusb300->reg +
FUSB300_OFFSET_EPSET1(i));
in = (reg & FUSB300_EPSET1_DIRIN) ? 1 : 0;
if (in)
in_ep_fifo_handler(fusb300->ep[i]);
else
out_ep_fifo_handler(fusb300->ep[i]);
}
}
}
spin_unlock(&fusb300->lock);
return IRQ_HANDLED;
}
static void fusb300_set_u2_timeout(struct fusb300 *fusb300,
u32 time)
{
u32 reg;
reg = ioread32(fusb300->reg + FUSB300_OFFSET_TT);
reg &= ~0xff;
reg |= FUSB300_SSCR2_U2TIMEOUT(time);
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_TT);
}
static void fusb300_set_u1_timeout(struct fusb300 *fusb300,
u32 time)
{
u32 reg;
reg = ioread32(fusb300->reg + FUSB300_OFFSET_TT);
reg &= ~(0xff << 8);
reg |= FUSB300_SSCR2_U1TIMEOUT(time);
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_TT);
}
static void init_controller(struct fusb300 *fusb300)
{
u32 reg;
u32 mask = 0;
u32 val = 0;
/* split on */
mask = val = FUSB300_AHBBCR_S0_SPLIT_ON | FUSB300_AHBBCR_S1_SPLIT_ON;
reg = ioread32(fusb300->reg + FUSB300_OFFSET_AHBCR);
reg &= ~mask;
reg |= val;
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_AHBCR);
/* enable high-speed LPM */
mask = val = FUSB300_HSCR_HS_LPM_PERMIT;
reg = ioread32(fusb300->reg + FUSB300_OFFSET_HSCR);
reg &= ~mask;
reg |= val;
iowrite32(reg, fusb300->reg + FUSB300_OFFSET_HSCR);
/*set u1 u2 timmer*/
fusb300_set_u2_timeout(fusb300, 0xff);
fusb300_set_u1_timeout(fusb300, 0xff);
/* enable all grp1 interrupt */
iowrite32(0xcfffff9f, fusb300->reg + FUSB300_OFFSET_IGER1);
}
/*------------------------------------------------------------------------*/
static int fusb300_udc_start(struct usb_gadget *g,
struct usb_gadget_driver *driver)
{
struct fusb300 *fusb300 = to_fusb300(g);
/* hook up the driver */
driver->driver.bus = NULL;
fusb300->driver = driver;
return 0;
}
static int fusb300_udc_stop(struct usb_gadget *g,
struct usb_gadget_driver *driver)
{
struct fusb300 *fusb300 = to_fusb300(g);
driver->unbind(&fusb300->gadget);
init_controller(fusb300);
fusb300->driver = NULL;
return 0;
}
/*--------------------------------------------------------------------------*/
static int fusb300_udc_pullup(struct usb_gadget *_gadget, int is_active)
{
return 0;
}
static const struct usb_gadget_ops fusb300_gadget_ops = {
.pullup = fusb300_udc_pullup,
.udc_start = fusb300_udc_start,
.udc_stop = fusb300_udc_stop,
};
static int __exit fusb300_remove(struct platform_device *pdev)
{
struct fusb300 *fusb300 = platform_get_drvdata(pdev);
usb_del_gadget_udc(&fusb300->gadget);
iounmap(fusb300->reg);
free_irq(platform_get_irq(pdev, 0), fusb300);
fusb300_free_request(&fusb300->ep[0]->ep, fusb300->ep0_req);
kfree(fusb300);
return 0;
}
static int fusb300_probe(struct platform_device *pdev)
{
struct resource *res, *ires, *ires1;
void __iomem *reg = NULL;
struct fusb300 *fusb300 = NULL;
struct fusb300_ep *_ep[FUSB300_MAX_NUM_EP];
int ret = 0;
int i;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
ret = -ENODEV;
pr_err("platform_get_resource error.\n");
goto clean_up;
}
ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!ires) {
ret = -ENODEV;
dev_err(&pdev->dev,
"platform_get_resource IORESOURCE_IRQ error.\n");
goto clean_up;
}
ires1 = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
if (!ires1) {
ret = -ENODEV;
dev_err(&pdev->dev,
"platform_get_resource IORESOURCE_IRQ 1 error.\n");
goto clean_up;
}
reg = ioremap(res->start, resource_size(res));
if (reg == NULL) {
ret = -ENOMEM;
pr_err("ioremap error.\n");
goto clean_up;
}
/* initialize udc */
fusb300 = kzalloc(sizeof(struct fusb300), GFP_KERNEL);
if (fusb300 == NULL)
goto clean_up;
for (i = 0; i < FUSB300_MAX_NUM_EP; i++) {
_ep[i] = kzalloc(sizeof(struct fusb300_ep), GFP_KERNEL);
if (_ep[i] == NULL)
goto clean_up;
fusb300->ep[i] = _ep[i];
}
spin_lock_init(&fusb300->lock);
platform_set_drvdata(pdev, fusb300);
fusb300->gadget.ops = &fusb300_gadget_ops;
fusb300->gadget.max_speed = USB_SPEED_HIGH;
fusb300->gadget.name = udc_name;
fusb300->reg = reg;
ret = request_irq(ires->start, fusb300_irq, IRQF_SHARED,
udc_name, fusb300);
if (ret < 0) {
pr_err("request_irq error (%d)\n", ret);
goto clean_up;
}
ret = request_irq(ires1->start, fusb300_irq,
IRQF_SHARED, udc_name, fusb300);
if (ret < 0) {
pr_err("request_irq1 error (%d)\n", ret);
goto clean_up;
}
INIT_LIST_HEAD(&fusb300->gadget.ep_list);
for (i = 0; i < FUSB300_MAX_NUM_EP ; i++) {
struct fusb300_ep *ep = fusb300->ep[i];
if (i != 0) {
INIT_LIST_HEAD(&fusb300->ep[i]->ep.ep_list);
list_add_tail(&fusb300->ep[i]->ep.ep_list,
&fusb300->gadget.ep_list);
}
ep->fusb300 = fusb300;
INIT_LIST_HEAD(&ep->queue);
ep->ep.name = fusb300_ep_name[i];
ep->ep.ops = &fusb300_ep_ops;
usb_ep_set_maxpacket_limit(&ep->ep, HS_BULK_MAX_PACKET_SIZE);
}
usb_ep_set_maxpacket_limit(&fusb300->ep[0]->ep, HS_CTL_MAX_PACKET_SIZE);
fusb300->ep[0]->epnum = 0;
fusb300->gadget.ep0 = &fusb300->ep[0]->ep;
INIT_LIST_HEAD(&fusb300->gadget.ep0->ep_list);
fusb300->ep0_req = fusb300_alloc_request(&fusb300->ep[0]->ep,
GFP_KERNEL);
if (fusb300->ep0_req == NULL) {
ret = -ENOMEM;
goto clean_up3;
}
init_controller(fusb300);
ret = usb_add_gadget_udc(&pdev->dev, &fusb300->gadget);
if (ret)
goto err_add_udc;
dev_info(&pdev->dev, "version %s\n", DRIVER_VERSION);
return 0;
err_add_udc:
fusb300_free_request(&fusb300->ep[0]->ep, fusb300->ep0_req);
clean_up3:
free_irq(ires->start, fusb300);
clean_up:
if (fusb300) {
if (fusb300->ep0_req)
fusb300_free_request(&fusb300->ep[0]->ep,
fusb300->ep0_req);
kfree(fusb300);
}
if (reg)
iounmap(reg);
return ret;
}
static struct platform_driver fusb300_driver = {
.remove = __exit_p(fusb300_remove),
.driver = {
.name = (char *) udc_name,
.owner = THIS_MODULE,
},
};
module_platform_driver_probe(fusb300_driver, fusb300_probe);
|