blob: 866c1a82bf1afe93843c64adeba71c6c37508e91 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
|
/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Copyright (c) 2012-2020, The Linux Foundation. All rights reserved.
*/
#ifndef _DP_PARSER_H_
#define _DP_PARSER_H_
#include <linux/platform_device.h>
#include <linux/phy/phy.h>
#include <linux/phy/phy-dp.h>
#include "msm_drv.h"
#define DP_LABEL "MDSS DP DISPLAY"
#define DP_MAX_PIXEL_CLK_KHZ 675000
#define DP_MAX_NUM_DP_LANES 4
enum dp_pm_type {
DP_CORE_PM,
DP_CTRL_PM,
DP_STREAM_PM,
DP_PHY_PM,
DP_MAX_PM
};
struct dss_io_region {
size_t len;
void __iomem *base;
};
struct dss_io_data {
struct dss_io_region ahb;
struct dss_io_region aux;
struct dss_io_region link;
struct dss_io_region p0;
};
static inline const char *dp_parser_pm_name(enum dp_pm_type module)
{
switch (module) {
case DP_CORE_PM: return "DP_CORE_PM";
case DP_CTRL_PM: return "DP_CTRL_PM";
case DP_STREAM_PM: return "DP_STREAM_PM";
case DP_PHY_PM: return "DP_PHY_PM";
default: return "???";
}
}
/**
* struct dp_display_data - display related device tree data.
*
* @ctrl_node: referece to controller device
* @phy_node: reference to phy device
* @is_active: is the controller currently active
* @name: name of the display
* @display_type: type of the display
*/
struct dp_display_data {
struct device_node *ctrl_node;
struct device_node *phy_node;
bool is_active;
const char *name;
const char *display_type;
};
/**
* struct dp_ctrl_resource - controller's IO related data
*
* @dp_controller: Display Port controller mapped memory address
* @phy_io: phy's mapped memory address
*/
struct dp_io {
struct dss_io_data dp_controller;
struct phy *phy;
union phy_configure_opts phy_opts;
};
/**
* struct dp_pinctrl - DP's pin control
*
* @pin: pin-controller's instance
* @state_active: active state pin control
* @state_hpd_active: hpd active state pin control
* @state_suspend: suspend state pin control
*/
struct dp_pinctrl {
struct pinctrl *pin;
struct pinctrl_state *state_active;
struct pinctrl_state *state_hpd_active;
struct pinctrl_state *state_suspend;
};
/* Regulators for DP devices */
struct dp_reg_entry {
char name[32];
int enable_load;
int disable_load;
};
struct dss_module_power {
unsigned int num_clk;
struct clk_bulk_data *clocks;
};
/**
* struct dp_parser - DP parser's data exposed to clients
*
* @pdev: platform data of the client
* @mp: gpio, regulator and clock related data
* @pinctrl: pin-control related data
* @disp_data: controller's display related data
* @parse: function to be called by client to parse device tree.
*/
struct dp_parser {
struct platform_device *pdev;
struct dss_module_power mp[DP_MAX_PM];
struct dp_pinctrl pinctrl;
struct dp_io io;
struct dp_display_data disp_data;
u32 max_dp_lanes;
struct drm_bridge *next_bridge;
int (*parse)(struct dp_parser *parser);
};
/**
* dp_parser_get() - get the DP's device tree parser module
*
* @pdev: platform data of the client
* return: pointer to dp_parser structure.
*
* This function provides client capability to parse the
* device tree and populate the data structures. The data
* related to clock, regulators, pin-control and other
* can be parsed using this module.
*/
struct dp_parser *dp_parser_get(struct platform_device *pdev);
/**
* dp_parser_find_next_bridge() - find an additional bridge to DP
*
* @parser: dp_parser data from client
*
* This function is used to find any additional bridge attached to
* the DP controller. The eDP interface requires a panel bridge.
*
* Return: 0 if able to get the bridge, otherwise negative errno for failure.
*/
int dp_parser_find_next_bridge(struct dp_parser *parser);
#endif
|