summaryrefslogtreecommitdiff
path: root/arch/powerpc/boot/dts/prpmc2800.dts
blob: 822aac7e5bbd38ba8e9cc8106d4d44dba82cf29e (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
/* Device Tree Source for Motorola PrPMC2800
 *
 * Author: Mark A. Greer <mgreer@mvista.com>
 *
 * 2007 (c) MontaVista, Software, Inc.  This file is licensed under
 * the terms of the GNU General Public License version 2.  This program
 * is licensed "as is" without any warranty of any kind, whether express
 * or implied.
 *
 * Property values that are labeled as "Default" will be updated by bootwrapper
 * if it can determine the exact PrPMC type.
 */

/dts-v1/;

/ {
	#address-cells = <1>;
	#size-cells = <1>;
	model = "PrPMC280/PrPMC2800"; /* Default */
	compatible = "motorola,PrPMC2800";
	coherency-off;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,7447 {
			device_type = "cpu";
			reg = <0>;
			clock-frequency = <733333333>;	/* Default */
			bus-frequency = <133333333>;
			timebase-frequency = <33333333>;
			i-cache-line-size = <32>;
			d-cache-line-size = <32>;
			i-cache-size = <32768>;
			d-cache-size = <32768>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x20000000>;			/* Default (512MB) */
	};

	mv64x60@f1000000 { /* Marvell Discovery */
		#address-cells = <1>;
		#size-cells = <1>;
		model = "mv64360";			/* Default */
		compatible = "marvell,mv64x60";
		clock-frequency = <133333333>;
		reg = <0xf1000000 0x10000>;
		virtual-reg = <0xf1000000>;
		ranges = <0x88000000 0x88000000 0x1000000 /* PCI 0 I/O Space */
			  0x80000000 0x80000000 0x8000000 /* PCI 0 MEM Space */
			  0xa0000000 0xa0000000 0x4000000 /* User FLASH */
			  0x00000000 0xf1000000 0x0010000 /* Bridge's regs */
			  0xf2000000 0xf2000000 0x0040000>;/* Integrated SRAM */

		flash@a0000000 {
			device_type = "rom";
			compatible = "direct-mapped";
			reg = <0xa0000000 0x4000000>; /* Default (64MB) */
			probe-type = "CFI";
			bank-width = <4>;
			partitions = <0x00000000 0x00100000 /* RO */
				      0x00100000 0x00040001 /* RW */
				      0x00140000 0x00400000 /* RO */
				      0x00540000 0x039c0000 /* RO */
				      0x03f00000 0x00100000>; /* RO */
			partition-names = "FW Image A", "FW Config Data", "Kernel Image", "Filesystem", "FW Image B";
		};

		mdio {
			#address-cells = <1>;
			#size-cells = <0>;
			device_type = "mdio";
			compatible = "marvell,mv64x60-mdio";
			PHY0: ethernet-phy@1 {
				device_type = "ethernet-phy";
				compatible = "broadcom,bcm5421";
				interrupts = <76>;	/* GPP 12 */
				interrupt-parent = <&PIC>;
				reg = <1>;
			};
			PHY1: ethernet-phy@3 {
				device_type = "ethernet-phy";
				compatible = "broadcom,bcm5421";
				interrupts = <76>;	/* GPP 12 */
				interrupt-parent = <&PIC>;
				reg = <3>;
			};
		};

		ethernet@2000 {
			reg = <0x2000 0x2000>;
			eth0 {
				device_type = "network";
				compatible = "marvell,mv64x60-eth";
				block-index = <0>;
				interrupts = <32>;
				interrupt-parent = <&PIC>;
				phy = <&PHY0>;
				local-mac-address = [ 00 00 00 00 00 00 ];
			};
			eth1 {
				device_type = "network";
				compatible = "marvell,mv64x60-eth";
				block-index = <1>;
				interrupts = <33>;
				interrupt-parent = <&PIC>;
				phy = <&PHY1>;
				local-mac-address = [ 00 00 00 00 00 00 ];
			};
		};

		SDMA0: sdma@4000 {
			device_type = "dma";
			compatible = "marvell,mv64x60-sdma";
			reg = <0x4000 0xc18>;
			virtual-reg = <0xf1004000>;
			interrupt-base = <0>;
			interrupts = <36>;
			interrupt-parent = <&PIC>;
		};

		SDMA1: sdma@6000 {
			device_type = "dma";
			compatible = "marvell,mv64x60-sdma";
			reg = <0x6000 0xc18>;
			virtual-reg = <0xf1006000>;
			interrupt-base = <0>;
			interrupts = <38>;
			interrupt-parent = <&PIC>;
		};

		BRG0: brg@b200 {
			compatible = "marvell,mv64x60-brg";
			reg = <0xb200 0x8>;
			clock-src = <8>;
			clock-frequency = <133333333>;
			current-speed = <9600>;
			bcr = <0>;
		};

		BRG1: brg@b208 {
			compatible = "marvell,mv64x60-brg";
			reg = <0xb208 0x8>;
			clock-src = <8>;
			clock-frequency = <133333333>;
			current-speed = <9600>;
			bcr = <0>;
		};

		CUNIT: cunit@f200 {
			reg = <0xf200 0x200>;
		};

		MPSCROUTING: mpscrouting@b400 {
			reg = <0xb400 0xc>;
		};

		MPSCINTR: mpscintr@b800 {
			reg = <0xb800 0x100>;
			virtual-reg = <0xf100b800>;
		};

		MPSC0: mpsc@8000 {
			device_type = "serial";
			compatible = "marvell,mpsc";
			reg = <0x8000 0x38>;
			virtual-reg = <0xf1008000>;
			sdma = <&SDMA0>;
			brg = <&BRG0>;
			cunit = <&CUNIT>;
			mpscrouting = <&MPSCROUTING>;
			mpscintr = <&MPSCINTR>;
			block-index = <0>;
			max_idle = <40>;
			chr_1 = <0>;
			chr_2 = <0>;
			chr_10 = <3>;
			mpcr = <0>;
			interrupts = <40>;
			interrupt-parent = <&PIC>;
		};

		MPSC1: mpsc@9000 {
			device_type = "serial";
			compatible = "marvell,mpsc";
			reg = <0x9000 0x38>;
			virtual-reg = <0xf1009000>;
			sdma = <&SDMA1>;
			brg = <&BRG1>;
			cunit = <&CUNIT>;
			mpscrouting = <&MPSCROUTING>;
			mpscintr = <&MPSCINTR>;
			block-index = <1>;
			max_idle = <40>;
			chr_1 = <0>;
			chr_2 = <0>;
			chr_10 = <3>;
			mpcr = <0>;
			interrupts = <42>;
			interrupt-parent = <&PIC>;
		};

		wdt@b410 {			/* watchdog timer */
			compatible = "marvell,mv64x60-wdt";
			reg = <0xb410 0x8>;
			timeout = <10>;		/* wdt timeout in seconds */
		};

		i2c@c000 {
			device_type = "i2c";
			compatible = "marvell,mv64x60-i2c";
			reg = <0xc000 0x20>;
			virtual-reg = <0xf100c000>;
			freq_m = <8>;
			freq_n = <3>;
			timeout = <1000>;		/* 1000 = 1 second */
			retries = <1>;
			interrupts = <37>;
			interrupt-parent = <&PIC>;
		};

		PIC: pic {
			#interrupt-cells = <1>;
			#address-cells = <0>;
			compatible = "marvell,mv64x60-pic";
			reg = <0x0 0x88>;
			interrupt-controller;
		};

		mpp@f000 {
			compatible = "marvell,mv64x60-mpp";
			reg = <0xf000 0x10>;
		};

		gpp@f100 {
			compatible = "marvell,mv64x60-gpp";
			reg = <0xf100 0x20>;
		};

		pci@80000000 {
			#address-cells = <3>;
			#size-cells = <2>;
			#interrupt-cells = <1>;
			device_type = "pci";
			compatible = "marvell,mv64x60-pci";
			reg = <0xcf8 0x8>;
			ranges = <0x01000000 0x0        0x0
					0x88000000 0x0 0x01000000
				  0x02000000 0x0 0x80000000
				  	0x80000000 0x0 0x08000000>;
			bus-range = <0 255>;
			clock-frequency = <66000000>;
			interrupt-pci-iack = <0xc34>;
			interrupt-parent = <&PIC>;
			interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
			interrupt-map = <
				/* IDSEL 0x0a */
				0x5000 0 0 1 &PIC 80
				0x5000 0 0 2 &PIC 81
				0x5000 0 0 3 &PIC 91
				0x5000 0 0 4 &PIC 93

				/* IDSEL 0x0b */
				0x5800 0 0 1 &PIC 91
				0x5800 0 0 2 &PIC 93
				0x5800 0 0 3 &PIC 80
				0x5800 0 0 4 &PIC 81

				/* IDSEL 0x0c */
				0x6000 0 0 1 &PIC 91
				0x6000 0 0 2 &PIC 93
				0x6000 0 0 3 &PIC 80
				0x6000 0 0 4 &PIC 81

				/* IDSEL 0x0d */
				0x6800 0 0 1 &PIC 93
				0x6800 0 0 2 &PIC 80
				0x6800 0 0 3 &PIC 81
				0x6800 0 0 4 &PIC 91
			>;
		};

		cpu-error@0070 {
			compatible = "marvell,mv64x60-cpu-error";
			reg = <0x70 0x10 0x128 0x28>;
			interrupts = <3>;
			interrupt-parent = <&PIC>;
		};

		sram-ctrl@0380 {
			compatible = "marvell,mv64x60-sram-ctrl";
			reg = <0x380 0x80>;
			interrupts = <13>;
			interrupt-parent = <&PIC>;
		};

		pci-error@1d40 {
			compatible = "marvell,mv64x60-pci-error";
			reg = <0x1d40 0x40 0xc28 0x4>;
			interrupts = <12>;
			interrupt-parent = <&PIC>;
		};

		mem-ctrl@1400 {
			compatible = "marvell,mv64x60-mem-ctrl";
			reg = <0x1400 0x60>;
			interrupts = <17>;
			interrupt-parent = <&PIC>;
		};
	};

	chosen {
		bootargs = "ip=on";
		linux,stdout-path = &MPSC0;
	};
};