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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Rockchip I2S/TDM Controller
description:
The Rockchip I2S/TDM Controller is a Time Division Multiplexed
audio interface found in various Rockchip SoCs, allowing up
to 8 channels of audio over a serial interface.
maintainers:
- Nicolas Frattaroli <frattaroli.nicolas@gmail.com>
allOf:
- $ref: dai-common.yaml#
properties:
compatible:
enum:
- rockchip,px30-i2s-tdm
- rockchip,rk1808-i2s-tdm
- rockchip,rk3308-i2s-tdm
- rockchip,rk3568-i2s-tdm
- rockchip,rk3588-i2s-tdm
- rockchip,rv1126-i2s-tdm
reg:
maxItems: 1
interrupts:
maxItems: 1
dmas:
minItems: 1
maxItems: 2
dma-names:
minItems: 1
maxItems: 2
items:
enum:
- rx
- tx
clocks:
minItems: 3
items:
- description: clock for TX
- description: clock for RX
- description: AHB clock driving the interface
- description:
Parent clock for mclk_tx (only required when using mclk-calibrate)
- description:
Parent clock for mclk_rx (only required when using mclk-calibrate)
- description:
Clock for sample rates that are an integer multiple of 8000
(only required when using mclk-calibrate)
- description:
Clock for sample rates that are an integer multiple of 11025
(only required when using mclk-calibrate)
clock-names:
minItems: 3
items:
- const: mclk_tx
- const: mclk_rx
- const: hclk
- const: mclk_tx_src
- const: mclk_rx_src
- const: mclk_root0
- const: mclk_root1
resets:
minItems: 1
maxItems: 2
description: resets for the tx and rx directions
reset-names:
minItems: 1
maxItems: 2
items:
enum:
- tx-m
- rx-m
rockchip,grf:
$ref: /schemas/types.yaml#/definitions/phandle
description:
The phandle of the syscon node for the GRF register.
rockchip,trcm-sync-tx-only:
type: boolean
description: Use TX BCLK/LRCK for both TX and RX.
rockchip,trcm-sync-rx-only:
type: boolean
description: Use RX BCLK/LRCK for both TX and RX.
"#sound-dai-cells":
const: 0
rockchip,i2s-rx-route:
$ref: /schemas/types.yaml#/definitions/uint32-array
description:
Defines the mapping of I2S RX sdis to I2S data bus lines.
By default, they are mapped one-to-one.
rockchip,i2s-rx-route = <3> would mean sdi3 is receiving from data0.
maxItems: 4
items:
enum: [0, 1, 2, 3]
rockchip,i2s-tx-route:
$ref: /schemas/types.yaml#/definitions/uint32-array
description:
Defines the mapping of I2S TX sdos to I2S data bus lines.
By default, they are mapped one-to-one.
rockchip,i2s-tx-route = <3> would mean sdo3 is sending to data0.
maxItems: 4
items:
enum: [0, 1, 2, 3]
rockchip,io-multiplex:
description:
Specify that the GPIO lines on the I2S bus are multiplexed such that
the direction (input/output) needs to be dynamically adjusted.
type: boolean
required:
- compatible
- reg
- interrupts
- dmas
- dma-names
- clocks
- clock-names
- resets
- reset-names
- "#sound-dai-cells"
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/rk3568-cru.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/pinctrl/rockchip.h>
bus {
#address-cells = <2>;
#size-cells = <2>;
i2s@fe410000 {
compatible = "rockchip,rk3568-i2s-tdm";
reg = <0x0 0xfe410000 0x0 0x1000>;
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru MCLK_I2S1_8CH_TX>, <&cru MCLK_I2S1_8CH_RX>,
<&cru HCLK_I2S1_8CH>;
clock-names = "mclk_tx", "mclk_rx", "hclk";
dmas = <&dmac1 3>, <&dmac1 2>;
dma-names = "rx", "tx";
resets = <&cru SRST_M_I2S1_8CH_TX>, <&cru SRST_M_I2S1_8CH_RX>;
reset-names = "tx-m", "rx-m";
rockchip,trcm-sync-tx-only;
rockchip,grf = <&grf>;
#sound-dai-cells = <0>;
pinctrl-names = "default";
pinctrl-0 =
<&i2s1m0_sclktx
&i2s1m0_sclkrx
&i2s1m0_lrcktx
&i2s1m0_lrckrx
&i2s1m0_sdi0
&i2s1m0_sdi1
&i2s1m0_sdi2
&i2s1m0_sdi3
&i2s1m0_sdo0
&i2s1m0_sdo1
&i2s1m0_sdo2
&i2s1m0_sdo3>;
};
};
|
