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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/mtd/mediatek,mtk-nfc.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek(MTK) SoCs raw NAND FLASH controller (NFC)
maintainers:
- Xiangsheng Hou <xiangsheng.hou@mediatek.com>
properties:
compatible:
enum:
- mediatek,mt2701-nfc
- mediatek,mt2712-nfc
- mediatek,mt7622-nfc
reg:
items:
- description: Base physical address and size of NFI.
interrupts:
items:
- description: NFI interrupt
clocks:
items:
- description: clock used for the controller
- description: clock used for the pad
clock-names:
items:
- const: nfi_clk
- const: pad_clk
ecc-engine:
description: device-tree node of the required ECC engine.
$ref: /schemas/types.yaml#/definitions/phandle
patternProperties:
"^nand@[a-f0-9]$":
$ref: nand-chip.yaml#
unevaluatedProperties: false
properties:
reg:
maximum: 1
nand-on-flash-bbt: true
nand-ecc-mode:
const: hw
allOf:
- $ref: nand-controller.yaml#
- if:
properties:
compatible:
contains:
const: mediatek,mt2701-nfc
then:
patternProperties:
"^nand@[a-f0-9]$":
properties:
nand-ecc-step-size:
enum: [ 512, 1024 ]
nand-ecc-strength:
enum: [4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 36,
40, 44, 48, 52, 56, 60]
- if:
properties:
compatible:
contains:
const: mediatek,mt2712-nfc
then:
patternProperties:
"^nand@[a-f0-9]$":
properties:
nand-ecc-step-size:
enum: [ 512, 1024 ]
nand-ecc-strength:
enum: [4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 28, 32, 36,
40, 44, 48, 52, 56, 60, 68, 72, 80]
- if:
properties:
compatible:
contains:
const: mediatek,mt7622-nfc
then:
patternProperties:
"^nand@[a-f0-9]$":
properties:
nand-ecc-step-size:
const: 512
nand-ecc-strength:
enum: [4, 6, 8, 10, 12]
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
- ecc-engine
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/mt2701-clk.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
nand-controller@1100d000 {
compatible = "mediatek,mt2701-nfc";
reg = <0 0x1100d000 0 0x1000>;
interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_LOW>;
clocks = <&pericfg CLK_PERI_NFI>,
<&pericfg CLK_PERI_NFI_PAD>;
clock-names = "nfi_clk", "pad_clk";
ecc-engine = <&bch>;
#address-cells = <1>;
#size-cells = <0>;
nand@0 {
reg = <0>;
nand-on-flash-bbt;
nand-ecc-mode = "hw";
nand-ecc-step-size = <1024>;
nand-ecc-strength = <24>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
preloader@0 {
label = "pl";
read-only;
reg = <0x0 0x400000>;
};
android@400000 {
label = "android";
reg = <0x400000 0x12c00000>;
};
};
};
};
};
|