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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/interrupt-controller/ti,sci-intr.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Texas Instruments K3 Interrupt Router
maintainers:
- Lokesh Vutla <lokeshvutla@ti.com>
allOf:
- $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml#
description: |
The Interrupt Router (INTR) module provides a mechanism to mux M
interrupt inputs to N interrupt outputs, where all M inputs are selectable
to be driven per N output.
Interrupt Router
+----------------------+
| Inputs Outputs |
+-------+ | +------+ +-----+ |
| GPIO |----------->| | irq0 | | 0 | | Host IRQ
+-------+ | +------+ +-----+ | controller
| . . | +-------+
+-------+ | . . |----->| IRQ |
| INTA |----------->| . . | +-------+
+-------+ | . +-----+ |
| +------+ | N | |
| | irqM | +-----+ |
| +------+ |
| |
+----------------------+
There is one register per output (MUXCNTL_N) that controls the selection.
Configuration of these MUXCNTL_N registers is done by a system controller
(like the Device Memory and Security Controller on K3 AM654 SoC). System
controller will keep track of the used and unused registers within the Router.
Driver should request the system controller to get the range of GIC IRQs
assigned to the requesting hosts. It is the drivers responsibility to keep
track of Host IRQs.
Communication between the host processor running an OS and the system
controller happens through a protocol called TI System Control Interface
(TISCI protocol).
properties:
compatible:
const: ti,sci-intr
ti,intr-trigger-type:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [1, 4]
description: |
Should be one of the following.
1 = If intr supports edge triggered interrupts.
4 = If intr supports level triggered interrupts.
reg:
maxItems: 1
interrupt-controller: true
'#interrupt-cells':
enum: [1, 2]
description: |
Number of cells in interrupt specifier. Depends on ti,intr-trigger-type:
- If ti,intr-trigger-type is present: must be 1
The 1st cell should contain interrupt router input hw number.
- If ti,intr-trigger-type is absent: must be 2
The 1st cell should contain interrupt router input hw number.
The 2nd cell should contain interrupt trigger type (preserved by router).
ti,interrupt-ranges:
$ref: /schemas/types.yaml#/definitions/uint32-matrix
description: |
Interrupt ranges that converts the INTR output hw irq numbers
to parents's input interrupt numbers.
items:
items:
- description: |
"output_irq" specifies the base for intr output irq
- description: |
"parent's input irq" specifies the base for parent irq
- description: |
"limit" specifies the limit for translation
if:
required:
- ti,intr-trigger-type
then:
properties:
'#interrupt-cells':
const: 1
description: Interrupt ID only. Interrupt type is specified globally
else:
properties:
'#interrupt-cells':
const: 2
description: Interrupt ID and corresponding interrupt type
required:
- compatible
- interrupt-controller
- '#interrupt-cells'
- ti,sci
- ti,sci-dev-id
- ti,interrupt-ranges
unevaluatedProperties: false
examples:
- |
main_gpio_intr: interrupt-controller0 {
compatible = "ti,sci-intr";
ti,intr-trigger-type = <1>;
interrupt-controller;
interrupt-parent = <&gic500>;
#interrupt-cells = <1>;
ti,sci = <&dmsc>;
ti,sci-dev-id = <131>;
ti,interrupt-ranges = <0 360 32>;
};
- |
interrupt-controller {
compatible = "ti,sci-intr";
interrupt-controller;
interrupt-parent = <&gic500>;
#interrupt-cells = <2>;
ti,sci = <&dmsc>;
ti,sci-dev-id = <131>;
ti,interrupt-ranges = <0 360 32>;
};
|
