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|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Samsung's High Speed I2C controller
maintainers:
- Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
description: |
The Samsung's High Speed I2C controller is used to interface with I2C devices
at various speeds ranging from 100kHz to 3.4MHz.
In case the HSI2C controller is encapsulated within USI block (it's the case
e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to
define USI node in device tree file, choosing "i2c" configuration. Please see
Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.
properties:
compatible:
oneOf:
- enum:
- samsung,exynos5250-hsi2c # Exynos5250 and Exynos5420
- samsung,exynos5260-hsi2c # Exynos5260
- samsung,exynos7-hsi2c # Exynos7
- samsung,exynosautov9-hsi2c # ExynosAutoV9 and Exynos850
- const: samsung,exynos5-hsi2c # Exynos5250 and Exynos5420
deprecated: true
reg:
maxItems: 1
interrupts:
maxItems: 1
clock-frequency:
default: 100000
description:
Desired operating frequency in Hz of the bus.
If not specified, the bus operates in fast-speed mode at 100kHz.
If specified, the bus operates in high-speed mode only if the
clock-frequency is >= 1MHz.
clocks:
minItems: 1
items:
- description: I2C operating clock
- description: Bus clock (APB)
clock-names:
minItems: 1
items:
- const: hsi2c
- const: hsi2c_pclk
required:
- compatible
- reg
- interrupts
- clocks
allOf:
- $ref: /schemas/i2c/i2c-controller.yaml#
- if:
properties:
compatible:
contains:
enum:
- samsung,exynosautov9-hsi2c
then:
properties:
clocks:
minItems: 2
clock-names:
minItems: 2
required:
- clock-names
else:
properties:
clocks:
maxItems: 1
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/exynos5420.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
hsi2c_8: i2c@12e00000 {
compatible = "samsung,exynos5250-hsi2c";
reg = <0x12e00000 0x1000>;
interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <100000>;
clocks = <&clock CLK_USI4>;
clock-names = "hsi2c";
pmic@66 {
/* compatible = "samsung,s2mps11-pmic"; */
reg = <0x66>;
};
};
- |
#include <dt-bindings/clock/exynos850.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
hsi2c_2: i2c@138c0000 {
compatible = "samsung,exynosautov9-hsi2c";
reg = <0x138c0000 0xc0>;
interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>,
<&cmu_peri CLK_GOUT_HSI2C2_PCLK>;
clock-names = "hsi2c", "hsi2c_pclk";
pmic@66 {
/* compatible = "samsung,s2mps11-pmic"; */
reg = <0x66>;
};
};
|
