blob: e32a0251ff6ac228eb2bf54e3e58d351f3dc8db3 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/clock/mediatek,mt7988-ethwarp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: MediaTek MT7988 ethwarp Controller
maintainers:
- Daniel Golle <daniel@makrotopia.org>
description:
The Mediatek MT7988 ethwarp controller provides clocks and resets for the
Ethernet related subsystems found the MT7988 SoC.
The clock values can be found in <dt-bindings/clock/mt*-clk.h>.
properties:
compatible:
items:
- const: mediatek,mt7988-ethwarp
reg:
maxItems: 1
'#clock-cells':
const: 1
'#reset-cells':
const: 1
required:
- compatible
- reg
- '#clock-cells'
- '#reset-cells'
additionalProperties: false
examples:
- |
#include <dt-bindings/reset/ti-syscon.h>
soc {
#address-cells = <2>;
#size-cells = <2>;
clock-controller@15031000 {
compatible = "mediatek,mt7988-ethwarp";
reg = <0 0x15031000 0 0x1000>;
#clock-cells = <1>;
#reset-cells = <1>;
};
};
|