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:
kernel/linux.git
linux-2.6.11.y
linux-2.6.12.y
linux-2.6.13.y
linux-2.6.14.y
linux-2.6.15.y
linux-2.6.16.y
linux-2.6.17.y
linux-2.6.18.y
linux-2.6.19.y
linux-2.6.20.y
linux-2.6.21.y
linux-2.6.22.y
linux-2.6.23.y
linux-2.6.24.y
linux-2.6.25.y
linux-2.6.26.y
linux-2.6.27.y
linux-2.6.28.y
linux-2.6.29.y
linux-2.6.30.y
linux-2.6.31.y
linux-2.6.32.y
linux-2.6.33.y
linux-2.6.34.y
linux-2.6.35.y
linux-2.6.36.y
linux-2.6.37.y
linux-2.6.38.y
linux-2.6.39.y
linux-3.0.y
linux-3.1.y
linux-3.10.y
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linux-3.15.y
linux-3.16.y
linux-3.17.y
linux-3.18.y
linux-3.19.y
linux-3.2.y
linux-3.3.y
linux-3.4.y
linux-3.5.y
linux-3.6.y
linux-3.7.y
linux-3.8.y
linux-3.9.y
linux-4.0.y
linux-4.1.y
linux-4.10.y
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linux-4.17.y
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linux-4.19.y
linux-4.2.y
linux-4.20.y
linux-4.3.y
linux-4.4.y
linux-4.5.y
linux-4.6.y
linux-4.7.y
linux-4.8.y
linux-4.9.y
linux-5.0.y
linux-5.1.y
linux-5.10.y
linux-5.11.y
linux-5.12.y
linux-5.13.y
linux-5.14.y
linux-5.15.y
linux-5.16.y
linux-5.17.y
linux-5.18.y
linux-5.19.y
linux-5.2.y
linux-5.3.y
linux-5.4.y
linux-5.5.y
linux-5.6.y
linux-5.7.y
linux-5.8.y
linux-5.9.y
linux-6.0.y
linux-6.1.y
linux-6.10.y
linux-6.11.y
linux-6.2.y
linux-6.3.y
linux-6.4.y
linux-6.5.y
linux-6.6.y
linux-6.7.y
linux-6.8.y
linux-6.9.y
linux-rockchip-6.1.y
linux-rockchip-6.5.y
linux-rolling-lts
linux-rolling-stable
master
Linux kernel stable tree (mirror)
Andrey V.Kosteltsev
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path:
root
/
tools
/
testing
/
cxl
/
test
/
mock.c
Age
Commit message (
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)
Author
Files
Lines
2024-09-09
cxl/pci: Remove duplicated implementation of waiting for memory_info_valid
Yanfei Xu
1
-2
/
+2
2024-09-04
cxl/pci: Rename cxl_setup_parent_dport() and cxl_dport_map_regs()
Li Ming
1
-3
/
+3
2024-08-10
cxl/test: Skip cxl_setup_parent_dport() for emulated dports
Li Ming
1
-0
/
+12
2024-02-17
cxl/test: Add support for qos_class checking
Dave Jiang
1
-0
/
+14
2023-06-26
Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxl
Dan Williams
1
-11
/
+33
2023-06-26
Revert "cxl/port: Enable the HDM decoder capability for switch ports"
Dan Williams
1
-15
/
+0
2023-06-25
cxl: Rename 'uport' to 'uport_dev'
Dan Williams
1
-5
/
+5
2023-06-25
cxl/rch: Prepare for caching the MMIO mapped PCIe AER capability
Dan Williams
1
-1
/
+3
2023-06-25
cxl/acpi: Probe RCRB later during RCH downstream port creation
Robert Richter
1
-7
/
+27
2023-05-18
cxl/port: Enable the HDM decoder capability for switch ports
Dan Williams
1
-0
/
+15
2023-05-13
tools/testing/cxl: Use DEFINE_STATIC_SRCU()
Dan Williams
1
-1
/
+1
2023-02-15
cxl/hdm: Create emulated cxl_hdm for devices that do not have HDM decoders
Dave Jiang
1
-3
/
+5
2023-02-15
cxl/hdm: Emulate HDM decoder from DVSEC range registers
Dave Jiang
1
-3
/
+4
2023-02-15
cxl/port: Export cxl_dvsec_rr_decode() to cxl_port
Dave Jiang
1
-2
/
+19
2022-12-03
cxl/acpi: Extract component registers of restricted hosts from RCRB
Robert Richter
1
-0
/
+19
2022-06-29
tools/testing/cxl: Fix cxl_hdm_decode_init() calling convention
Dan Williams
1
-3
/
+5
2022-05-19
cxl/port: Reuse 'struct cxl_hdm' context for hdm init
Dan Williams
1
-2
/
+3
2022-05-19
cxl/pci: Drop @info argument to cxl_hdm_decode_init()
Dan Williams
1
-6
/
+3
2022-05-19
cxl/mem: Merge cxl_dvsec_ranges() and cxl_hdm_decode_init()
Dan Williams
1
-4
/
+4
2022-05-19
cxl/mem: Consolidate CXL DVSEC Range enumeration in the core
Dan Williams
1
-0
/
+16
2022-05-19
cxl/pci: Move cxl_await_media_ready() to the core
Dan Williams
1
-0
/
+15
2022-02-09
cxl/core/port: Remove @host argument for dport + decoder enumeration
Dan Williams
1
-16
/
+12
2022-02-09
cxl/core/hdm: Add CXL standard decoder enumeration to the core
Dan Williams
1
-0
/
+50
2022-02-09
cxl/core: Generalize dport enumeration in the core
Dan Williams
1
-26
/
+19
2021-11-15
cxl/test: Mock acpi_table_parse_cedt()
Dan Williams
1
-21
/
+9
2021-09-21
tools/testing/cxl: Introduce a mocked-up CXL port hierarchy
Dan Williams
1
-0
/
+171