Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2017-06-12 | clk: meson8b: export the ethernet gate clock | Martin Blumenstingl | 1 | -0/+1 |
2017-06-12 | clk: meson8b: export the USB clocks | Martin Blumenstingl | 1 | -0/+5 |
2017-06-12 | clk: meson8b: export the gate clock for the HW random number generator | Martin Blumenstingl | 1 | -0/+1 |
2017-06-12 | clk: meson8b: export the SDIO clock | Martin Blumenstingl | 1 | -0/+1 |
2017-06-12 | clk: meson8b: export the SAR ADC clocks | Martin Blumenstingl | 1 | -0/+2 |
2016-09-02 | clk: meson: Copy meson8b CLKID defines to private header file | Alexander Müller | 1 | -2/+0 |
2016-06-23 | clk: meson8b: clean up composite clocks | Michael Turquette | 1 | -1/+3 |
2015-06-06 | clk: meson: Add support for Meson clock controller | Carlo Caione | 1 | -0/+25 |