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47 hoursMerge tag 'spi-fix-v6.17-rc2' of ↵Linus Torvalds4-17/+27
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fixes from Mark Brown: "A small collection of fixes that came in during the past week, a few driver specifics plus one fix for the spi-mem core where we weren't taking account of the frequency capabilities of the system when determining if it can support an operation" * tag 'spi-fix-v6.17-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: st: fix PM macros to use CONFIG_PM instead of CONFIG_PM_SLEEP spi: spi-qpic-snand: fix calculating of ECC OOB regions' properties spi: spi-fsl-lpspi: Clamp too high speed_hz spi: spi-mem: add spi_mem_adjust_op_freq() in spi_mem_supports_op() spi: spi-mem: Add missing kdoc argument spi: spi-qpic-snand: use correct CW_PER_PAGE value for OOB write
2 daysspi: st: fix PM macros to use CONFIG_PM instead of CONFIG_PM_SLEEPRaphael Gallais-Pou1-5/+5
pm_sleep_ptr() depends on CONFIG_PM_SLEEP while pm_ptr() depends on CONFIG_PM. Since ST SSC4 implements runtime PM it makes sense using pm_ptr() here. For the same reason replace PM macros that use CONFIG_PM. Doing so prevents from using __maybe_unused attribute of runtime PM functions. Link: https://lore.kernel.org/lkml/CAMuHMdX9nkROkAJJ5odv4qOWe0bFTmaFs=Rfxsfuc9+DT-bsEQ@mail.gmail.com Fixes: 6f8584a4826f ("spi: st: Switch from CONFIG_PM_SLEEP guards to pm_sleep_ptr()") Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/20250820180310.9605-1-rgallaispou@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-09Merge tag 'spi-fix-v6.17-merge-window' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi fixes from Mark Brown: "There's one fix here for an issue with the CS42L43 where we were allocating a single property for client devices as just that property rather than a terminated array of properties like we are supposed to. We also have an update to the MAINTAINERS file for some Renesas devices" * tag 'spi-fix-v6.17-merge-window' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: spi: cs42l43: Property entry should be a null-terminated array MAINTAINERS: Add entries for the RZ/V2H(P) RSPI
2025-08-07spi: spi-qpic-snand: fix calculating of ECC OOB regions' propertiesGabor Juhos1-6/+14
The OOB layout used by the driver has two distinct regions which contains hardware specific ECC data, yet the qcom_spi_ooblayout_ecc() function sets the same offset and length values for both regions which is clearly wrong. Change the code to calculate the correct values for both regions. For reference, the following table shows the computed offset and length values for various OOB size/ECC strength configurations: +-----------------+-----------------+ |before the change| after the change| +-------+----------+--------+--------+--------+--------+--------+ | OOB | ECC | region | region | region | region | region | | size | strength | index | offset | length | offset | length | +-------+----------+--------+--------+--------+--------+--------+ | 128 | 8 | 0 | 113 | 15 | 0 | 49 | | | | 1 | 113 | 15 | 65 | 63 | +-------+----------+--------+--------+--------+--------+--------+ | 128 | 4 | 0 | 117 | 11 | 0 | 37 | | | | 1 | 117 | 11 | 53 | 75 | +-------+----------+--------+--------+--------+--------+--------+ | 64 | 4 | 0 | 53 | 11 | 0 | 37 | | | | 1 | 53 | 11 | 53 | 11 | +-------+----------+--------+--------+--------+--------+--------+ Fixes: 7304d1909080 ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface") Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://patch.msgid.link/20250805-qpic-snand-oob-ecc-fix-v2-1-e6f811c70d6f@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-07spi: spi-fsl-lpspi: Clamp too high speed_hzStefan Wahren1-5/+3
Currently the driver is not able to handle the case that a SPI device specifies a higher spi-max-frequency than half of per-clk: per-clk should be at least two times of transfer speed Fix this by clamping to the max possible value and use the minimum SCK period of 2 cycles. Fixes: 77736a98b859 ("spi: lpspi: add the error info of transfer speed setting") Signed-off-by: Stefan Wahren <wahrenst@gmx.net> Link: https://patch.msgid.link/20250807100742.9917-1-wahrenst@gmx.net Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-07treewide: rename GPIO set callbacks back to their original namesBartosz Golaszewski1-1/+1
The conversion of all GPIO drivers to using the .set_rv() and .set_multiple_rv() callbacks from struct gpio_chip (which - unlike their predecessors - return an integer and allow the controller drivers to indicate failures to users) is now complete and the legacy ones have been removed. Rename the new callbacks back to their original names in one sweeping change. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-08-06spi: spi-mem: add spi_mem_adjust_op_freq() in spi_mem_supports_op()Tianyu Xu1-0/+3
The function spi_mem_adjust_op_freq() within spi_mem_exec_op() adjusts the op->max_freq, which will informs the SPI controller of the maximum frequency for each operation. This adjustment is based on combined information from the SPI device and the board's wiring conditions. Similarly, spi_mem_supports_op() will check the capabilities of the SPI controller. It also requires the combined information before it can accurately determine whether the SPI controller supports a given operation. Signed-off-by: Tianyu Xu <tianyxu@cisco.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://patch.msgid.link/20250805015403.43928-1-tianyxu@cisco.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-04spi: spi-mem: Add missing kdoc argumentMiquel Raynal1-0/+1
The "*mem" pointer has been added without description, describe it in the kdoc comment in order to fix the following W=1 warning: Warning: drivers/spi/spi-mem.c:594 function parameter 'mem' not described in 'spi_mem_calc_op_duration' Fixes: a11a51896572 ("spi: spi-mem: Take into account the actual maximum frequency") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202507310409.fnuQ21qb-lkp@intel.com/ Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://patch.msgid.link/20250804095013.409700-1-miquel.raynal@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-04spi: spi-qpic-snand: use correct CW_PER_PAGE value for OOB writeGabor Juhos1-1/+1
The qcom_spi_program_oob() function uses only the last codeword to write the OOB data into the flash, but it sets the CW_PER_PAGE field in the CFG0 register as it would use all codewords. It seems that this confuses the hardware somehow, and any access to the flash fails with a timeout error after the function is called. The problem can be easily reproduced with the following commands: # dd if=/dev/zero bs=2176 count=1 > /tmp/test.bin 1+0 records in 1+0 records out # flash_erase /dev/mtd4 0 0 Erasing 128 Kibyte @ 0 -- 100 % complete # nandwrite -O /dev/mtd4 /tmp/test.bin Writing data to block 0 at offset 0x0 # nanddump -o /dev/mtd4 >/dev/null ECC failed: 0 ECC corrected: 0 Number of bad blocks: 0 Number of bbt blocks: 0 Block size 131072, page size 2048, OOB size 128 Dumping data starting at 0x00000000 and ending at 0x00020000... [ 33.197605] qcom_snand 79b0000.spi: failure to read oob libmtd: error!: MEMREADOOB64 ioctl failed for mtd4, offset 0 (eraseblock 0) error 110 (Operation timed out) [ 35.277582] qcom_snand 79b0000.spi: failure in submitting cmd descriptor libmtd: error!: cannot read 2048 bytes from mtd4 (eraseblock 0, offset 2048) error 110 (Operation timed out) nanddump: error!: mtd_read Change the code to use the correct CW_PER_PAGE value to avoid this. Fixes: 7304d1909080 ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface") Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> Link: https://patch.msgid.link/20250801-qpic-snand-oob-cwpp-fix-v1-1-f5a41b86af2e@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-08-01spi: cs42l43: Property entry should be a null-terminated arraySimon Trimmer1-1/+1
The software node does not specify a count of property entries, so the array must be null-terminated. When unterminated, this can lead to a fault in the downstream cs35l56 amplifier driver, because the node parse walks off the end of the array into unknown memory. Fixes: 0ca645ab5b15 ("spi: cs42l43: Add speaker id support to the bridge configuration") Closes: https://bugzilla.kernel.org/show_bug.cgi?id=220371 Signed-off-by: Simon Trimmer <simont@opensource.cirrus.com> Link: https://patch.msgid.link/20250731160109.1547131-1-simont@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-31Merge tag 'mtd/for-6.17' of ↵Linus Torvalds1-5/+22
git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull mtd updates from Miquel Raynal: "MTD changes: - Apart from a binding conversion to yaml, only minor changes/small fixes have been merged. Raw NAND changes: - Minor fixes for various controller drivers like DMA mapping checks, better timing derivations or bitflip statistics. - some Hynix NAND flashes were not supporting read-retries, so don't even try to do it SPI NAND changes: - In order to support high-speed modes, certain chips need extra configuration like adding more dummy cycles. This is now possible, especially on Winbond chips. - Aside from that, Gigadevice gets support for a new chip (GD5F1GM9). SPI NOR changes: - A notable changes is the fix for exiting 4-byte addressing on Infineon SEMPER flashes. These flashes do not support the standard EX4B opcode (E9h), and use a vendor-specific opcode (B8h) instead. - There is also a fix for unlocking flashes that are write-protected at power-on. This was caused by using an uninitialized mtd_info in spi_nor_try_unlock_all()" * tag 'mtd/for-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (26 commits) mtd: spinand: winbond: Add comment about the maximum frequency mtd: spinand: winbond: Enable high-speed modes on w35n0xjw mtd: spinand: winbond: Enable high-speed modes on w25n0xjw mtd: spinand: Add a ->configure_chip() hook mtd: spinand: Add a frequency field to all READ_FROM_CACHE variants mtd: spinand: Fix macro alignment spi: spi-mem: Take into account the actual maximum frequency spi: spi-mem: Use picoseconds for calculating the op durations mtd: rawnand: atmel: set pmecc data setup time mtd: spinand: propagate spinand_wait() errors from spinand_write_page() mtd: rawnand: fsmc: Add missing check after DMA map mtd: rawnand: rockchip: Add missing check after DMA map mtd: rawnand: hynix: don't try read-retry on SLC NANDs mtd: rawnand: atmel: Fix dma_mapping_error() address mtd: nand: brcmnand: fix mtd corrected bits stat mtd: rawnand: renesas: Add missing check after DMA map mtd: spinand: gigadevice: Add support for GD5F1GM9 chips mtd: nand: brcmnand: replace manual string choices with standard helpers mtd: map: Don't use "proxy" headers mtd: spi-nor: Fix spi_nor_try_unlock_all() ...
2025-07-31Merge tag 'clk-for-linus' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "This is the usual collection of primarily clk driver updates. The big part of the diff is all the new Qualcomm clk drivers added for a few SoCs they're working on. The other two vendors with significant work this cycle are Renesas and Amlogic. Renesas adds a bunch of clks to existing drivers and supports some new SoCs while Amlogic is starting a significant refactoring to simplify their code. The core framework gained a pair of helpers to get the 'struct device' or 'struct device_node' associated with a 'struct clk_hw'. Some associated KUnit tests were added for these simple helpers as well. Beyond that core change there are lots of little fixes throughout the clk drivers for the stuff we see every day, wrong clk driver data that affects tree topology or supported frequencies, etc. They're not found until the clks are actually used by some consumer device driver. New Drivers: - Global, display, gpu, video, camera, tcsr, and rpmh clock controller for the Qualcomm Milos SoC - Camera, display, GPU, and video clock controllers for Qualcomm QCS615 - Video clock controller driver for Qualcomm SM6350 - Camera clock controller driver for Qualcomm SC8180X - I3C clocks and resets on Renesas RZ/G3E - Expanded Serial Peripheral Interface (xSPI) clocks and resets on Renesas RZ/V2H(P) and RZ/V2N - SPI (RSPI) clocks and resets on Renesas RZ/V2H(P) - SDHI and I2C clocks on Renesas RZ/T2H and RZ/N2H - Ethernet clocks and resets on Renesas RZ/G3E - Initial support for the Renesas RZ/T2H (R9A09G077) and RZ/N2H (R9A09G087) SoCs - Ethernet clocks and resets on Renesas RZ/V2H and RZ/V2N - Timer, I2C, watchdog, GPU, and USB2.0 clocks and resets on Renesas RZ/V2N Updates: - Support atomic PWMs in the PWM clk driver - clk_hw_get_dev() and clk_hw_get_of_node() helpers - Replace round_rate() with determine_rate() in various clk drivers - Convert clk DT bindings to DT schema format for DT validation - Various clk driver cleanups and refactorings from static analysis tools and possibly real humans - A lot of little fixes here and there to things like clk tree topology, missing frequencies, flagging clks as critical, etc" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (216 commits) clk: clocking-wizard: Fix the round rate handling for versal clk: Fix typos clk: spacemit: ccu_pll: fix error return value in recalc_rate callback clk: tegra: periph: Make tegra_clk_periph_ops static clk: tegra: periph: Fix error handling and resolve unsigned compare warning clk: imx: scu: convert from round_rate() to determine_rate() clk: imx: pllv4: convert from round_rate() to determine_rate() clk: imx: pllv3: convert from round_rate() to determine_rate() clk: imx: pllv2: convert from round_rate() to determine_rate() clk: imx: pll14xx: convert from round_rate() to determine_rate() clk: imx: pfd: convert from round_rate() to determine_rate() clk: imx: frac-pll: convert from round_rate() to determine_rate() clk: imx: fracn-gppll: convert from round_rate() to determine_rate() clk: imx: fixup-div: convert from round_rate() to determine_rate() clk: imx: cpu: convert from round_rate() to determine_rate() clk: imx: busy: convert from round_rate() to determine_rate() clk: imx: composite-93: remove round_rate() in favor of determine_rate() clk: imx: composite-8m: remove round_rate() in favor of determine_rate() clk: qcom: Remove redundant pm_runtime_mark_last_busy() calls clk: imx: Remove redundant pm_runtime_mark_last_busy() calls ...
2025-07-30spi: spi-mem: Take into account the actual maximum frequencyMiquel Raynal1-4/+14
In order to pick the best variant, the duration of each typical operation is derived and then compared. These durations are based on the maximum capabilities of the chips, which are commonly the limiting factors. However there are other possible limiting pieces, such as the hardware layout, EMC considerations and in some cases, the SPI controller itself. We need to take this into account to further refine our variant choice, so let's use the actual frequency that will be used for the operation instead of the theoretical maximum. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Mark Brown <broonie@kernel.org>
2025-07-30spi: spi-mem: Use picoseconds for calculating the op durationsMiquel Raynal1-3/+10
spi_mem_calc_op_duration() is deriving the duration of a specific op, by multiplying the number of cycles with the time a cycle will last. This time was measured in nanoseconds, which means at high frequencies the delta between two frequencies might not be properly catch due to roundings. For instance, the Winbond driver has a changing number of dummy cycles depending on the speed, adding +8 dummy cycles when running at 166MHz compared to 162MHz. Both frequencies would lead to using a 6ns delay per cycle for the op duration computation, whereas in practice there is a small difference which actually offsets the number of extra dummy cycles on a normal page read. Augmenting the precision of the calculation by using picoseconds prevents selecting a lower frequency if we can do slightly better with another frequency involving more cycles. As a result, the above situation leads to comparing cycles of 6024 and 6172 picoseconds which leads to picking the most efficient variant. Reviewed-by: Mark Brown <broonie@kernel.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2025-07-30Merge tag 'locking-core-2025-07-29' of ↵Linus Torvalds1-1/+3
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull locking updates from Ingo Molnar: "Locking primitives: - Mark devm_mutex_init() as __must_check and fix drivers that didn't check the return code (Thomas Weißschuh) - Reorganize <linux/local_lock.h> to better expose the internal APIs to local variables (Sebastian Andrzej Siewior) - Remove OWNER_SPINNABLE in rwsem (Jinliang Zheng) - Remove redundant #ifdefs in the mutex code (Ran Xiaokai) Lockdep: - Avoid returning struct in lock_stats() (Arnd Bergmann) - Change `static const` into enum for LOCKF_*_IRQ_* (Arnd Bergmann) - Temporarily use synchronize_rcu_expedited() in lockdep_unregister_key() to speed things up. (Breno Leitao) Rust runtime: - Add #[must_use] to Lock::try_lock() (Jason Devers)" * tag 'locking-core-2025-07-29' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: lockdep: Speed up lockdep_unregister_key() with expedited RCU synchronization locking/mutex: Remove redundant #ifdefs locking/lockdep: Change 'static const' variables to enum values locking/lockdep: Avoid struct return in lock_stats() locking/rwsem: Use OWNER_NONSPINNABLE directly instead of OWNER_SPINNABLE rust: sync: Add #[must_use] to Lock::try_lock() locking/mutex: Mark devm_mutex_init() as __must_check leds: lp8860: Check return value of devm_mutex_init() spi: spi-nxp-fspi: Check return value of devm_mutex_init() local_lock: Move this_cpu_ptr() notation from internal to main header
2025-07-30Merge branches 'clk-bindings', 'clk-cleanup', 'clk-pwm', 'clk-hw-device', ↵Stephen Boyd1-1/+1
'clk-xilinx' and 'clk-adi' into clk-next - Support atomic PWMs in the PWM clk driver - clk_hw_get_dev() and clk_hw_get_of_node() helpers * clk-bindings: (30 commits) dt-bindings: clock: convert lpc1850-cgu.txt to yaml format dt-bindings: clock: Convert qca,ath79-pll to DT schema dt-bindings: clock: Convert nuvoton,npcm750-clk to DT schema dt-bindings: clock: Convert moxa,moxart-clock to DT schema dt-bindings: clock: Convert microchip,pic32mzda-clk to DT schema dt-bindings: clock: Convert maxim,max9485 to DT schema dt-bindings: clock: Convert qcom,krait-cc to DT schema dt-bindings: clock: qcom: Remove double colon from description dt-bindings: clock: convert lpc1850-ccu.txt to yaml format dt-bindings: clock: Convert alphascale,asm9260-clock-controller to DT schema dt-bindings: clock: Convert marvell,armada-370-corediv-clock to DT schema dt-bindings: clock: Convert marvell,armada-3700-periph-clock to DT schema dt-bindings: clock: Convert marvell,mvebu-core-clock to DT schema dt-bindings: clock: Convert marvell,berlin2-clk to DT schema dt-bindings: clock: Convert marvell,dove-divider-clock to DT schema dt-bindings: clock: Convert marvell,armada-3700-tbg-clock to DT schema dt-bindings: clock: Convert marvell-armada-370-gating-clock to DT schema dt-bindings: clock: Convert marvell,armada-xp-cpu-clock to DT schema dt-bindings: clock: Convert TI-NSPIRE clocks to DT schema dt-bindings: clock: Convert lsi,axm5516-clks to DT schema ... * clk-cleanup: (29 commits) clk: clocking-wizard: Fix the round rate handling for versal clk: Fix typos clk: tegra: periph: Make tegra_clk_periph_ops static clk: tegra: periph: Fix error handling and resolve unsigned compare warning clk: imx: scu: convert from round_rate() to determine_rate() clk: imx: pllv4: convert from round_rate() to determine_rate() clk: imx: pllv3: convert from round_rate() to determine_rate() clk: imx: pllv2: convert from round_rate() to determine_rate() clk: imx: pll14xx: convert from round_rate() to determine_rate() clk: imx: pfd: convert from round_rate() to determine_rate() clk: imx: frac-pll: convert from round_rate() to determine_rate() clk: imx: fracn-gppll: convert from round_rate() to determine_rate() clk: imx: fixup-div: convert from round_rate() to determine_rate() clk: imx: cpu: convert from round_rate() to determine_rate() clk: imx: busy: convert from round_rate() to determine_rate() clk: imx: composite-93: remove round_rate() in favor of determine_rate() clk: imx: composite-8m: remove round_rate() in favor of determine_rate() clk: bcm: bcm2835: convert from round_rate() to determine_rate() MAINTAINERS: Include clk.py under COMMON CLK FRAMEWORK entry clk: ti: Simplify ti_find_clock_provider() ... * clk-pwm: clk: pwm: Make use of non-sleeping PWMs clk: pwm: Don't reconfigure running PWM at probe time clk: pwm: Convert to use pwm_apply_might_sleep() clk: pwm: Let .get_duty_cycle() return the real duty cycle * clk-hw-device: clk: tests: add clk_hw_get_dev() and clk_hw_get_of_node() tests clk: tests: Make clk_register_clk_parent_data_device_driver() common clk: add a clk_hw helpers to get the clock device or device_node * clk-xilinx: clk: xilinx: vcu: Update vcu init/reset sequence clk: xilinx: vcu: unregister pll_post only if registered correctly * clk-adi: clk: clk-axi-clkgen: fix coding style issues clk: clk-axi-clkgen move to min/max() clk: clk-axi-clkgen: detect axi_clkgen_limits at runtime include: adi-axi-common: add new helper macros include: linux: move adi-axi-common.h out of fpga clk: clk-axi-clkgen: make sure to include mod_devicetable.h clk: clk-axi-clkgen: fix fpfd_max frequency for zynq
2025-07-29Merge tag 'spi-v6.17' of ↵Linus Torvalds37-454/+2479
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi Pull spi updates from Mark Brown: "This release is almost entirely driver work, mostly new drivers with the usual smattering of per driver updates anf fixes, with only trivial changes in the core. Highlights include: - Quite a bit of maintainence work on the STM32 and Qualcomm drivers - Usage of the newly added devm_dma_request_chan() in the ateml driver, pulling in the relevant dmaengine change - Cleanups of our usage of the PM autosuspend functions, this pulls in some PM core changes on a shared tag - Support for ADI sigma-delta triggers, Amlogic SPISG, Mediatek MT6991 and MT8196, Renesas RZ/V2H(P) and SOPHGO SG2042" * tag 'spi-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (62 commits) spi: SPISG: Fix less than zero comparison on a u32 variable spi: intel: Allow writeable MTD partition with module param spi: Add driver for the RZ/V2H(P) RSPI IP spi: dt-bindings: Document the RZ/V2H(P) RSPI MAINTAINERS: Add an entry for Amlogic spi driver spi: Add Amlogic SPISG driver spi: dt-bindings: Add binding document of Amlogic SPISG controller spi: spi-sg2044-nor: Add SPI-NOR controller for SG2042 spi: spi-sg2044-nor: Add configurable chip_info spi: dt-bindings: spi-sg2044-nor: Change SOPHGO SG2042 spi: spi-qpic-snand: simplify bad block marker duplication spi: spidev: Add an entry for the ABB spi sensors dt-bindings: trivial-devices: Document ABB sensors spi: stm32-ospi: Fix NULL vs IS_ERR() bug in stm32_ospi_get_resources() spi: gpio: Use explicit 'unsigned int' for parameter types spi: dt-bindings: spi-mux: Drop "spi-max-frequency" as required spi: st: Switch from CONFIG_PM_SLEEP guards to pm_sleep_ptr() spi: rspi: Convert to DEFINE_SIMPLE_DEV_PM_OPS() spi: sh-msiof: Convert to DEFINE_SIMPLE_DEV_PM_OPS() spi: xilinx: Fix block comment style and minor cleanups ...
2025-07-29Merge tag 'pm-6.17-rc1' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management updates from Rafael Wysocki: "As is tradition, cpufreq is the part with the largest number of updates that include core fixes and cleanups as well as updates of several assorted drivers, but there are also quite a few updates related to system sleep, mostly focused on asynchronous suspend and resume of devices and on making the integration of system suspend and resume with runtime PM easier. Runtime PM is also updated to allow some code duplication in drivers to be eliminated going forward and to work more consistently overall in some cases. Apart from that, there are some driver core updates related to PM domains that should help to address ordering issues with devm_ cleanup routines relying on PM domains, some assorted devfreq updates including core fixes and cleanups, tooling updates, and documentation and MAINTAINERS updates. Specifics: - Fix two initialization ordering issues in the cpufreq core and a governor initialization error path in it, and clean it up (Lifeng Zheng) - Add Granite Rapids support in no-HWP mode to the intel_pstate cpufreq driver (Li RongQing) - Make intel_pstate always use HWP_DESIRED_PERF when operating in the passive mode (Rafael Wysocki) - Allow building the tegra124 cpufreq driver as a module (Aaron Kling) - Do minor cleanups for Rust cpufreq and cpumask APIs and fix MAINTAINERS entry for cpu.rs (Abhinav Ananthu, Ritvik Gupta, Lukas Bulwahn) - Clean up assorted cpufreq drivers (Arnd Bergmann, Dan Carpenter, Krzysztof Kozlowski, Sven Peter, Svyatoslav Ryhel, Lifeng Zheng) - Add the NEED_UPDATE_LIMITS flag to the CPPC cpufreq driver (Prashant Malani) - Fix minimum performance state label error in the amd-pstate driver documentation (Shouye Liu) - Add the CPUFREQ_GOV_STRICT_TARGET flag to the userspace cpufreq governor and explain HW coordination influence on it in the documentation (Shashank Balaji) - Fix opencoded for_each_cpu() in idle_state_valid() in the DT cpuidle driver (Yury Norov) - Remove info about non-existing QoS interfaces from the PM QoS documentation (Ulf Hansson) - Use c_* types via kernel prelude in Rust for OPP (Abhinav Ananthu) - Add HiSilicon uncore frequency scaling driver to devfreq (Jie Zhan) - Allow devfreq drivers to add custom sysfs ABIs (Jie Zhan) - Simplify the sun8i-a33-mbus devfreq driver by using more devm functions (Uwe Kleine-König) - Fix an index typo in trans_stat() in devfreq (Chanwoo Choi) - Check devfreq governor before using governor->name (Lifeng Zheng) - Remove a redundant devfreq_get_freq_range() call from devfreq_add_device() (Lifeng Zheng) - Limit max_freq with scaling_min_freq in devfreq (Lifeng Zheng) - Replace sscanf() with kstrtoul() in set_freq_store() (Lifeng Zheng) - Extend the asynchronous suspend and resume of devices to handle suppliers like parents and consumers like children (Rafael Wysocki) - Make pm_runtime_force_resume() work for drivers that set the DPM_FLAG_SMART_SUSPEND flag and allow PCI drivers and drivers that collaborate with the general ACPI PM domain to set it (Rafael Wysocki) - Add kernel parameter to disable asynchronous suspend/resume of devices (Tudor Ambarus) - Drop redundant might_sleep() calls from some functions in the device suspend/resume core code (Zhongqiu Han) - Fix the handling of monitors connected right before waking up the system from sleep (tuhaowen) - Clean up MAINTAINERS entries for suspend and hibernation (Rafael Wysocki) - Fix error code path in the KEXEC_JUMP flow and drop a redundant pm_restore_gfp_mask() call from it (Rafael Wysocki) - Rearrange suspend/resume error handling in the core device suspend and resume code (Rafael Wysocki) - Fix up white space that does not follow coding style in the hibernation core code (Darshan Rathod) - Document return values of suspend-related API functions in the runtime PM framework (Sakari Ailus) - Mark last busy stamp in multiple autosuspend-related functions in the runtime PM framework and update its documentation (Sakari Ailus) - Take active children into account in pm_runtime_get_if_in_use() for consistency (Rafael Wysocki) - Fix NULL pointer dereference in get_pd_power_uw() in the dtpm_cpu power capping driver (Sivan Zohar-Kotzer) - Add support for the Bartlett Lake platform to the Intel RAPL power capping driver (Qiao Wei) - Add PL4 support for Panther Lake to the intel_rapl_msr power capping driver (Zhang Rui) - Update contact information in the PM ABI docs and maintainer information in the power domains DT binding (Rafael Wysocki) - Update PM header inclusions to follow the IWYU (Include What You Use) principle (Andy Shevchenko) - Add flags to specify power on attach/detach for PM domains, make the driver core detach PM domains in device_unbind_cleanup(), and drop the dev_pm_domain_detach() call from the platform bus type (Claudiu Beznea) - Improve Python binding's Makefile for cpupower (John B. Wyatt IV) - Fix printing of CORE, CPU fields in cpupower-monitor (Gautham Shenoy)" * tag 'pm-6.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (75 commits) cpufreq: CPPC: Mark driver with NEED_UPDATE_LIMITS flag PM: docs: Use my kernel.org address in ABI docs and DT bindings PM: hibernate: Fix up white space that does not follow coding style PM: sleep: Rearrange suspend/resume error handling in the core Documentation: amd-pstate:fix minimum performance state label error PM: runtime: Take active children into account in pm_runtime_get_if_in_use() kexec_core: Drop redundant pm_restore_gfp_mask() call kexec_core: Fix error code path in the KEXEC_JUMP flow PM: sleep: Clean up MAINTAINERS entries for suspend and hibernation drivers: cpufreq: add Tegra114 support rust: cpumask: Replace `MaybeUninit` and `mem::zeroed` with `Opaque` APIs cpufreq: Exit governor when failed to start old governor cpufreq: Move the check of cpufreq_driver->get into cpufreq_verify_current_freq() cpufreq: Init policy->rwsem before it may be possibly used cpufreq: Initialize cpufreq-based frequency-invariance later cpufreq: Remove duplicate check in __cpufreq_offline() cpufreq: Contain scaling_cur_freq.attr in cpufreq_attrs cpufreq: intel_pstate: Add Granite Rapids support in no-HWP mode cpufreq: intel_pstate: Always use HWP_DESIRED_PERF in passive mode PM / devfreq: Add HiSilicon uncore frequency scaling driver ...
2025-07-25spi: SPISG: Fix less than zero comparison on a u32 variableColin Ian King1-1/+1
The check for ns < 0 is always false because variable ns is a u32 which is not a signed type. Fix this by making ns a s32 type. Fixes: cef9991e04ae ("spi: Add Amlogic SPISG driver") Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Link: https://patch.msgid.link/20250725171701.839927-1-colin.i.king@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-25spi: intel: Allow writeable MTD partition with module paramJakub Czapiga1-3/+10
The MTD device is blocked from writing to the SPI-NOR chip if any region of it is write-protected, even if "writeable=1" module parameter is set. Add ability to bypass this behaviour by introducing new module parameter "ignore_protestion_status" which allows to rely on the write protection mechanism of SPI-NOR chip itself, which most modern chips (since the 1990'+) have already implemented. Any erase/write operations performed on the write-protected section will be rejected by the chip. Signed-off-by: Jakub Czapiga <czapiga@google.com> Link: https://patch.msgid.link/20250725122542.2633334-1-czapiga@google.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-25spi: sophgo: Add SPI NOR controller for SG2042Mark Brown1-3/+26
Merge series from Zixian Zeng <sycamoremoon376@gmail.com>: Add support SPI NOR flash memory controller for SG2042, using upstreamed SG2044 SPI NOR driver. Tested on SG2042 Pioneer Box, read, write operations. Thanks Chen Wang who provided machine and guidance.
2025-07-25Add RSPI support for RZ/V2HMark Brown3-0/+475
Merge series from Fabrizio Castro <fabrizio.castro.jz@renesas.com>: This series adds support for the Renesas RZ/V2H RSPI IP.
2025-07-24support for amlogic the new SPI IPMark Brown3-0/+898
Merge series from Xianwei Zhao <xianwei.zhao@amlogic.com>: Introduced support for the new SPI IP (SPISG). The SPISG is a communication-oriented SPI controller from Amlogic,supporting three operation modes: PIO, block DMA, and scatter-gather DMA. Add the drivers and device tree bindings corresponding to the SPISG.
2025-07-24spi: Add driver for the RZ/V2H(P) RSPI IPFabrizio Castro3-0/+475
The Renesas RZ/V2H(P) RSPI IP supports 4-wire and 3-wire serial communications in both host role and target role. It can use a DMA, but the I/O can also be driven by the processor. RX-only, TX-only, and RX-TX operations are available in DMA mode, while in processor I/O mode it only RX-TX operations are supported. Add a driver to support 4-wire serial communications as host role in processor I/O mode. Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Link: https://patch.msgid.link/20250704162036.468765-3-fabrizio.castro.jz@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-24spi: Add Amlogic SPISG driverSunny Luo3-0/+898
Introduced support for the new SPI IP (SPISG) driver. The SPISG is a communication-oriented SPI controller from Amlogic,supporting three operation modes: PIO, block DMA, and scatter-gather DMA. Due to there is no FIFO, PIO mode can only transfer one word at a time, which is extremely slow. Therefore, this mode was not implemented. Signed-off-by: Sunny Luo <sunny.luo@amlogic.com> Signed-off-by: Xianwei Zhao <xianwei.zhao@amlogic.com> Link: https://patch.msgid.link/20250718-spisg-v5-2-b8f0f1eb93a2@amlogic.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-24spi: spi-sg2044-nor: Add SPI-NOR controller for SG2042Zixian Zeng1-0/+6
Add support for SOPHGO SG2042 SPI-NOR flash controller. Signed-off-by: Zixian Zeng <sycamoremoon376@gmail.com> Reviewed-by: Chen Wang <unicorn_wang@outlook.com> & Tested-by: Chen Wang Link: https://patch.msgid.link/20250720-sfg-spifmc-v4-3-033188ad801e@gmail.com Reviewed-by: Chen Wang <unicorn_wang@outlook.com> & Tested-by: Chen Wang Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-24spi: spi-sg2044-nor: Add configurable chip_infoZixian Zeng1-3/+20
SG2044 and SG2042 have similar SPI-NOR flash controller design, but have incompatibility which causes existing driver not working on SG2042: 1. SPI-NOR flash controller on SG2042 have no OPT register. 2. FIFO trigger level on SG2042 should be strictly less than 8. So introduce a new configurable chip_info structure to hold the different configuration. Link: https://github.com/sophgo/sophgo-doc/blob/main/SG2042/TRM/source/SPI-flash.rst Signed-off-by: Zixian Zeng <sycamoremoon376@gmail.com> Reviewed-by: Chen Wang <unicorn_wang@outlook.com> & Tested-by: Chen Wang Link: https://patch.msgid.link/20250720-sfg-spifmc-v4-2-033188ad801e@gmail.com Reviewed-by: Chen Wang <unicorn_wang@outlook.com> & Tested-by: Chen Wang Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-23spi: spi-qpic-snand: simplify bad block marker duplicationGabor Juhos1-4/+10
Due to the expectations of the SPINAND code, the driver duplicates the bad block markers during raw OOB reads. It has been implemented by using two if statements, and due to the opposite conditions one of conditional codepaths always runs. Since the effect of both codepaths is the same, remove the if statements and use a single line solution instead. Also add a note about why the duplication is required. No functional changes intended. Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> Link: https://patch.msgid.link/20250711-qpic-snand-simplify-bbm-copy-v1-1-dd2608325f72@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-23spi: spi-qpic-snand: don't hardcode ECC stepsGabor Juhos1-1/+1
NAND devices with different page sizes requires different number of ECC steps, yet the qcom_spi_ecc_init_ctx_pipelined() function sets 4 steps in 'ecc_cfg' unconditionally. The correct number of the steps is calculated earlier in the function already, so use that instead of the hardcoded value. Fixes: 7304d1909080 ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface") Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> Link: https://patch.msgid.link/20250723-qpic-snand-fix-steps-v1-1-d800695dde4c@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-22Merge branches 'pm-misc' and 'pm-tools'Rafael J. Wysocki1-1/+1
Merge miscellaneous power management updates and cpupower utility updates for 6.17-rc1: - Update contact information in the PM ABI docs and maintainer information in the power domains DT binding (Rafael Wysocki) - Update PM header inclusions to follow the IWYU (Include What You Use) principle (Andy Shevchenko) - Add flags to specify power on attach/detach for PM domains, make the driver core detach PM domains in device_unbind_cleanup(), and drop the dev_pm_domain_detach() call from the platform bus type (Claudiu Beznea) - Improve Python binding's Makefile for cpupower (John B. Wyatt IV) - Fix printing of CORE, CPU fields in cpupower-monitor (Gautham Shenoy) * pm-misc: PM: docs: Use my kernel.org address in ABI docs and DT bindings driver core: platform: Drop dev_pm_domain_detach() call PM: domains: Detach on device_unbind_cleanup() PM: domains: Add flags to specify power on attach/detach PM: Don't use "proxy" headers * pm-tools: cpupower: Improve Python binding's Makefile pm: cpupower: Fix printing of CORE, CPU fields in cpupower-monitor pm: cpupower: Fix the snapshot-order of tsc,mperf, clock in mperf_stop()
2025-07-21spidev: introduce trivial abb sensor deviceMark Brown5-10/+38
Merge series from Heiko Schocher <hs@denx.de>: This series introduces the changes needed for trivial spi based sensors from ABB, currently operated from userspace.
2025-07-21spi: spidev: Add an entry for the ABB spi sensorsHeiko Schocher1-0/+2
This sensors are currently controlled from userspace, ideally we will add full drivers in the future. Signed-off-by: Heiko Schocher <hs@denx.de> Link: https://patch.msgid.link/20250719063355.73111-3-hs@denx.de Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-16spi: stm32-ospi: Fix NULL vs IS_ERR() bug in stm32_ospi_get_resources()Dan Carpenter1-2/+2
This code was changed from using devm_ioremap() which returns NULL to using devm_ioremap_resource() which returns error pointers. Update the error checking to match. Fixes: defe01abfb7f ("spi: stm32-ospi: Use of_reserved_mem_region_to_resource() for "memory-region"") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://patch.msgid.link/fb2a26a2-119b-4b5a-8d44-b29e2c736081@sabinyo.mountain Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-16spi: gpio: Use explicit 'unsigned int' for parameter typesDarshan Rathod1-8/+8
The C standard allows 'unsigned' as a shorthand for 'unsigned int'. For improved code clarity and consistency with the prevailing kernel coding style, replace the shorthand with the more explicit 'unsigned int' type for function parameters. This is a purely stylistic cleanup and has no functional impact on the generated code. Signed-off-by: Darshan Rathod <darshanrathod475@gmail.com> Link: https://patch.msgid.link/20250716095906.21812-1-darshanrathod475@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-15spi: st: Switch from CONFIG_PM_SLEEP guards to pm_sleep_ptr()Raphael Gallais-Pou1-9/+5
Letting the compiler remove these functions when the kernel is built without CONFIG_PM_SLEEP support is simpler and less error prone than the use of #ifdef based kernel configuration guards. Signed-off-by: Raphael Gallais-Pou <rgallaispou@gmail.com> Link: https://patch.msgid.link/20250609-update_pm_macro-v1-1-819a53ef0eed@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-14spi: Add check for 8-bit transfer with 8 IO mode supportCheng Ming Lin1-4/+10
The current SPI framework does not verify if the SPI device supports 8 IO mode when doing an 8-bit transfer. This patch adds a check to ensure that if the transfer tx_nbits or rx_nbits is 8, the SPI mode must support 8 IO. If not, an error is returned, preventing undefined behavior. Fixes: d6a711a898672 ("spi: Fix OCTAL mode support") Cc: stable@vger.kernel.org Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw> Link: https://patch.msgid.link/20250714031023.504752-1-linchengming884@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-12spi: spi-nxp-fspi: Check return value of devm_mutex_init()Thomas Weißschuh1-1/+3
devm_mutex_init() can fail. With CONFIG_DEBUG_MUTEXES=y the mutex will be marked as unusable and trigger errors on usage. Add the missed check. Fixes: 48900813abd2 ("spi: spi-nxp-fspi: remove the goto in probe") Signed-off-by: Thomas Weißschuh <linux@weissschuh.net> Reviewed-by: Mark Brown <broonie@kernel.org> Signed-off-by: Boqun Feng <boqun.feng@gmail.com> Link: https://lore.kernel.org/r/20250617-must_check-devm_mutex_init-v7-1-d9e449f4d224@weissschuh.net
2025-07-10spi: rspi: Convert to DEFINE_SIMPLE_DEV_PM_OPS()Geert Uytterhoeven1-7/+2
Convert the Renesas RSPI/QSPI driver from SIMPLE_DEV_PM_OPS() to DEFINE_SIMPLE_DEV_PM_OPS() and pm_sleep_ptr(). This lets us drop the check for CONFIG_PM_SLEEP without impacting code size, while increasing build coverage. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/0b64c1c3803e6d3eeb3ae9cd8921d4fe67f37118.1752087701.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-10spi: sh-msiof: Convert to DEFINE_SIMPLE_DEV_PM_OPS()Geert Uytterhoeven1-8/+3
Convert the Renesas SuperH MSIOF driver from SIMPLE_DEV_PM_OPS() to DEFINE_SIMPLE_DEV_PM_OPS() and pm_sleep_ptr(). This lets us drop the check for CONFIG_PM_SLEEP without impacting code size, while increasing build coverage. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://patch.msgid.link/108c136f2cab9aa8bc8ac90d14a05e66fb87deb0.1752087740.git.geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-10spi: xilinx: Fix block comment style and minor cleanupsDarshan Rathod1-2/+3
This patch fixes block comment style issues and minor code cleanups as reported by checkpatch.pl. Signed-off-by: Darshan Rathod <darshanrathod475@gmail.com> Link: https://patch.msgid.link/20250710045058.1325-1-darshanrathod475@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-09spi: stm32-ospi: Use of_reserved_mem_region_to_resource() for "memory-region"Rob Herring (Arm)1-13/+7
Use the newly added of_reserved_mem_region_to_resource() function to handle "memory-region" properties. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://patch.msgid.link/20250709021638.2047365-1-robh@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-07PM: domains: Add flags to specify power on attach/detachClaudiu Beznea1-1/+1
Calling dev_pm_domain_attach()/dev_pm_domain_detach() in bus driver probe/remove functions can affect system behavior when the drivers attached to the bus use devres-managed resources. Since devres actions may need to access device registers, calling dev_pm_domain_detach() too early, i.e., before these actions complete, can cause failures on some systems. One such example is Renesas RZ/G3S SoC-based platforms. If the device clocks are managed via PM domains, invoking dev_pm_domain_detach() in the bus driver's remove function removes the device's clocks from the PM domain, preventing any subsequent pm_runtime_resume*() calls from enabling those clocks. The second argument of dev_pm_domain_attach() specifies whether the PM domain should be powered on during attachment. Likewise, the second argument of dev_pm_domain_detach() indicates whether the domain should be powered off during detachment. Upcoming changes address the issue described above (initially for the platform bus only) by deferring the call to dev_pm_domain_detach() until after devres_release_all() in device_unbind_cleanup(). The detach_power_off field in struct dev_pm_info stores the detach power off info from the second argument of dev_pm_domain_attach(). Because there are cases where the device's PM domain power-on/off behavior must be conditional (e.g., in i2c_device_probe()), the patch introduces PD_FLAG_ATTACH_POWER_ON and PD_FLAG_DETACH_POWER_OFF flags to be passed to dev_pm_domain_attach(). Finally, dev_pm_domain_attach() and its users are updated to use the newly introduced PD_FLAG_ATTACH_POWER_ON and PD_FLAG_DETACH_POWER_OFF macros. This change is preparatory. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Mathieu Poirier <mathieu.poirier@linaro.org> Acked-by: Wolfram Sang <wsa+renesas@sang-engineering.com> # I2C Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Link: https://patch.msgid.link/20250703112708.1621607-2-claudiu.beznea.uj@bp.renesas.com [ rjw: Changelog adjustments ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2025-07-07treewide: Remove redundantMark Brown18-49/+0
Merge series from Sakari Ailus <sakari.ailus@linux.intel.com>: Late last year I posted a set to switch to __pm_runtime_mark_last_busy() and gradually get rid of explicit pm_runtime_mark_last_busy() calls in drivers, embedding them in the appropriate pm_runtime_*autosuspend*() calls. The overall feedback I got at the time was that this is an unnecessary intermediate step, and removing the pm_runtime_mark_last_busy() calls can be done after adding them to the relevant Runtime PM autosuspend related functions.
2025-07-05spi: Remove redundant pm_runtime_mark_last_busy() callsSakari Ailus18-49/+0
pm_runtime_put_autosuspend(), pm_runtime_put_sync_autosuspend(), pm_runtime_autosuspend() and pm_request_autosuspend() now include a call to pm_runtime_mark_last_busy(). Remove the now-reduntant explicit call to pm_runtime_mark_last_busy(). Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Link: https://patch.msgid.link/20250704075447.3221784-1-sakari.ailus@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-02spi: spi-qpic-snand: add support for 8 bits ECC strengthGabor Juhos1-5/+16
Even though the hardware supports 8 bits ECC strength, but that is not handled in the driver yet. This change adds the missing bits in order to allow using the driver with chips which require 8 bits ECC strength. No functional changes intended with regard to the existing 4 bits ECC strength support. Tested on an IPQ9574 platform using a GigaDevice GD5F2GM7REYIG chip. Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> Link: https://patch.msgid.link/20250702-qpic-snand-8bit-ecc-v2-2-ae2c17a30bb7@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-02mtd: nand: qpic-common: add defines for ECC_MODE valuesGabor Juhos1-1/+1
Add defines for the values of the ECC_MODE field of the NAND_DEV0_ECC_CFG register and change both the 'qcom-nandc' and 'spi-qpic-snand' drivers to use those instead of magic numbers. No functional changes. This is in preparation for adding 8 bit ECC strength support for the 'spi-qpic-snand' driver. Reviewed-by: Md Sadre Alam <quic_mdalam@quicinc.com> Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://patch.msgid.link/20250702-qpic-snand-8bit-ecc-v2-1-ae2c17a30bb7@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-02iio: adc: ad7173: add SPI offload supportMark Brown4-5/+72
Merge series from David Lechner <dlechner@baylibre.com>: Also there is a new dt-binding and driver for a special SPI offload trigger FPGA IP core that is used in this particular setup.
2025-07-02spi: offload trigger: add ADI Util Sigma-Delta SPI driverDavid Lechner3-0/+65
Add a new driver for the ADI Util Sigma-Delta SPI FPGA IP core. This is used to trigger a SPI offload based on a RDY signal from an ADC while masking out other signals on the same line. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://patch.msgid.link/20250627-iio-adc-ad7173-add-spi-offload-support-v2-9-f49c55599113@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-01spi: stm32: delete stray tabs in stm32h7_spi_data_idleness()Dan Carpenter1-2/+2
These lines were indented one tab more than they should be. Delete the stray tabs. Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Acked-by: Alain Volmat <alain.volmat@foss.st.com> Reviewed-by: Clément Le Goffic <clement.legoffic@foss.st.com> Link: https://patch.msgid.link/2033b9fa-7b0f-4617-b94e-7b0a51c5c4b1@sabinyo.mountain Signed-off-by: Mark Brown <broonie@kernel.org>
2025-07-01spi: cadence-quadspi: fix cleanup of rx_chan on failure pathsKhairul Anuar Romli1-5/+0
Remove incorrect checks on cqspi->rx_chan that cause driver breakage during failure cleanup. Ensure proper resource freeing on the success path when operating in cqspi->use_direct_mode, preventing leaks and improving stability. Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com> Reviewed-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://patch.msgid.link/89765a2b94f047ded4f14babaefb7ef92ba07cb2.1751274389.git.khairul.anuar.romli@altera.com Signed-off-by: Mark Brown <broonie@kernel.org>