Age | Commit message (Expand) | Author | Files | Lines |
2019-04-02 | pinctrl: sh-pfc: rcar-gen3: Rename SEL_ADG_{A,B,C} to SEL_ADG{A,B,C} | Takeshi Kihara | 3 | -33/+33 |
2019-04-02 | pinctrl: sh-pfc: rcar-gen3: Rename RTS{0,1,3,4}# pin function definitions | Takeshi Kihara | 5 | -76/+76 |
2019-04-02 | pinctrl: sh-pfc: rcar-gen3: Remove CC5_OSCOUT pin | Takeshi Kihara | 6 | -12/+6 |
2019-04-02 | pinctrl: sh-pfc: rcar-gen3: Remove HDMI CEC pins, groups, and functions | Takeshi Kihara | 4 | -97/+26 |
2019-04-02 | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2 | Takeshi Kihara | 1 | -11/+9 |
2019-04-02 | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit31 when using SIM0_D | Takeshi Kihara | 1 | -5/+4 |
2019-04-02 | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit16 when using NFALE and NFRB_N | Takeshi Kihara | 1 | -2/+2 |
2019-04-02 | pinctrl: sh-pfc: Improve PINMUX_IPSR_PHYS() documentation | Geert Uytterhoeven | 1 | -2/+2 |
2019-04-02 | pinctrl: sh-pfc: Validate enum IDs for regs with variable-width fields | Geert Uytterhoeven | 2 | -0/+13 |
2019-04-02 | pinctrl: sh-pfc: Validate enum IDs for regs with fixed-width fields | Geert Uytterhoeven | 1 | -2/+6 |
2019-04-02 | pinctrl: sh-pfc: Absorb enum IDs in PINMUX_DATA_REG() macro | Geert Uytterhoeven | 16 | -420/+420 |
2019-04-02 | pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG_VAR() macro | Geert Uytterhoeven | 18 | -402/+572 |
2019-04-02 | pinctrl: sh-pfc: Absorb enum IDs in PINMUX_CFG_REG() macro | Geert Uytterhoeven | 32 | -1128/+1137 |
2019-04-02 | pinctrl: sh-pfc: Allow compile-testing of all drivers | Geert Uytterhoeven | 2 | -99/+90 |
2019-04-02 | pinctrl: sh-pfc: Add missing #include <linux/errno.h> | Geert Uytterhoeven | 12 | -0/+12 |
2019-04-02 | pinctrl: sh-pfc: Introduce PINCTRL_SH_FUNC_GPIO helper symbol | Geert Uytterhoeven | 3 | -17/+23 |
2019-04-02 | pinctrl: sh-pfc: Validate pinmux tables at runtime when debugging | Geert Uytterhoeven | 1 | -0/+124 |
2019-03-18 | pinctrl: sh-pfc: rcar-gen3: Retain TDSELCTRL register across suspend/resume | Marek Vasut | 8 | -0/+24 |
2019-03-18 | pinctrl: sh-pfc: r8a77990: Move CANFD pin groups and functions | Fabrizio Castro | 1 | -8/+8 |
2019-03-18 | pinctrl: sh-pfc: r8a7796: Move CANFD pin groups and functions | Fabrizio Castro | 1 | -9/+9 |
2019-03-18 | pinctrl: sh-pfc: r8a7779: Add HSCIF0/1 pins | Ulrich Hecht | 1 | -0/+118 |
2019-03-18 | pinctrl: sh-pfc: r8a77990: Rename IOCTRLx registers | Geert Uytterhoeven | 1 | -3/+3 |
2019-03-18 | pinctrl: sh-pfc: r8a77980: Rename IOCTRLx registers | Geert Uytterhoeven | 1 | -11/+11 |
2019-03-18 | pinctrl: sh-pfc: r8a77970: Rename IOCTRLx registers | Geert Uytterhoeven | 1 | -8/+8 |
2019-02-11 | pinctrl: sh-pfc: r8a77965: Add DRIF pins, groups and functions | Takeshi Kihara | 1 | -0/+350 |
2019-02-11 | pinctrl: sh-pfc: r8a77965: Add TMU pins, groups and functions | Takeshi Kihara | 1 | -0/+48 |
2019-02-11 | pinctrl: sh-pfc: Validate fixed-size field widths at build time | Geert Uytterhoeven | 1 | -1/+2 |
2019-02-11 | pinctrl: sh-pfc: sh73a0: Fix fsic_spdif pin groups | Geert Uytterhoeven | 1 | -1/+2 |
2019-02-11 | pinctrl: sh-pfc: r8a7792: Fix vin1_data18_b pin group | Geert Uytterhoeven | 1 | -0/+1 |
2019-02-11 | pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin group | Geert Uytterhoeven | 1 | -1/+1 |
2019-02-11 | pinctrl: sh-pfc: emev2: Add missing pinmux functions | Geert Uytterhoeven | 1 | -0/+20 |
2019-02-05 | pinctrl: sh-pfc: r8a77990: Add DRIF pins, groups and functions | Takeshi Kihara | 1 | -2/+253 |
2019-01-21 | pinctrl: sh-pfc: r8a7778: Fix HSPI pin numbers and names | Geert Uytterhoeven | 1 | -3/+3 |
2019-01-21 | pinctrl: sh-pfc: r8a77990: Add TMU pins, groups and functions | Takeshi Kihara | 1 | -2/+51 |
2019-01-21 | pinctrl: sh-pfc: r8a77965: Replace DU_DOTCLKIN2 by DU_DOTCLKIN3 | Geert Uytterhoeven | 1 | -3/+3 |
2019-01-21 | pinctrl: sh-pfc: r8a7791: Fix VIN1 versioned groups | Geert Uytterhoeven | 1 | -34/+34 |
2019-01-21 | pinctrl: sh-pfc: r8a77980: Deduplicate VIN1 pin definitions | Geert Uytterhoeven | 1 | -43/+21 |
2019-01-21 | pinctrl: sh-pfc: r8a77970: Deduplicate VIN[01] pin definitions | Geert Uytterhoeven | 1 | -86/+42 |
2019-01-21 | pinctrl: sh-pfc: r8a7796: Deduplicate VIN5 pin definitions | Geert Uytterhoeven | 1 | -64/+26 |
2019-01-21 | pinctrl: sh-pfc: r8a7795: Deduplicate VIN5 pin definitions | Geert Uytterhoeven | 1 | -64/+26 |
2019-01-21 | pinctrl: sh-pfc: r8a7794: Initialize TDSEL register for ES1.0 | Wolfram Sang | 1 | -0/+16 |
2019-01-21 | pinctrl: sh-pfc: r8a7790: Initialize TDSEL register for ES1.0 | Wolfram Sang | 1 | -0/+17 |
2019-01-21 | pinctrl: sh-pfc: Print pin group when debugging | Geert Uytterhoeven | 1 | -0/+2 |
2019-01-21 | Revert "pinctrl: sh-pfc: r8a77990: Add support for pull-up only pins" | Geert Uytterhoeven | 1 | -18/+5 |
2019-01-21 | pinctrl: sh-pfc: r8a77990: GP6_9 does not have pull-down capability | Geert Uytterhoeven | 1 | -1/+10 |
2019-01-21 | pinctrl: sh-pfc: r8a77995: Fix MOD_SEL bit numbering | Takeshi Kihara | 1 | -4/+7 |
2019-01-21 | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL bit numbering | Takeshi Kihara | 1 | -14/+18 |
2019-01-21 | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit2 when using RX2, TX2 and SCK2 | Takeshi Kihara | 1 | -5/+5 |
2019-01-21 | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit3 when using TX0 | Takeshi Kihara | 1 | -2/+2 |
2018-12-18 | pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length | Geert Uytterhoeven | 1 | -2/+1 |