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2025-09-02pinctrl: samsung: Drop unused S3C24xx driver dataKrzysztof Kozlowski1-4/+0
Drop unused declarations after S3C24xx SoC family removal in the commit 61b7f8920b17 ("ARM: s3c: remove all s3c24xx support"). Fixes: 1ea35b355722 ("ARM: s3c: remove s3c24xx specific hacks") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20250830111657.126190-3-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-09-01pinctrl: samsung: Add ARTPEC-8 SoC specific configurationSeonGu Kang4-0/+63
Add Axis ARTPEC-8 SoC specific configuration data to enable pinctrl. Signed-off-by: SeonGu Kang <ksk4725@coasia.com> Signed-off-by: Priyadarsini G <priya.ganesh@samsung.com> Signed-off-by: Ravi Patel <ravi.patel@samsung.com> Link: https://lore.kernel.org/r/20250901051926.59970-3-ravi.patel@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-08-07treewide: rename GPIO set callbacks back to their original namesBartosz Golaszewski1-1/+1
The conversion of all GPIO drivers to using the .set_rv() and .set_multiple_rv() callbacks from struct gpio_chip (which - unlike their predecessors - return an integer and allow the controller drivers to indicate failures to users) is now complete and the legacy ones have been removed. Rename the new callbacks back to their original names in one sweeping change. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-07-05pinctrl: samsung: Fix gs101 irq chipPeter Griffin1-0/+3
When adding the dedicated gs101_wkup_irq_chip struct to support the eint wakeup mask the .eint_con, eint_mask and .eint_pend fields were missed. The result is that irqs on gs101 for the buttons etc are broken. Reported-by: André Draszik <andre.draszik@linaro.org> Fixes: 2642f55d44ce ("pinctrl: samsung: add support for gs101 wakeup mask programming") Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Tested-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20250702-fix-gs101-irqchip-v1-1-ccc84b44ad72@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-25pinctrl: samsung: add support for gs101 wakeup mask programmingPeter Griffin2-14/+90
gs101 differs to other currently supported SoCs in that it has 3 wakeup mask registers for the 67 external wakeup interrupt pins in alive and far_alive. EINT_WAKEUP_MASK 0x3A80 EINT[31:0] EINT_WAKEUP_MASK2 0x3A84 EINT[63:32] EINT_WAKEUP_MASK3 0x3A88 EINT[66:64] Add gs101 specific callbacks and a dedicated gs101_wkup_irq_chip struct to handle these differences. The current wakeup mask with upstream is programmed as WAKEUP_MASK0[0x3A80] value[0xFFFFFFFF] WAKEUP_MASK1[0x3A84] value[0xF2FFEFFF] WAKEUP_MASK2[0x3A88] value[0xFFFFFFFF] Which corresponds to the following wakeup sources: gpa7-3 vol down gpa8-1 vol up gpa10-1 power gpa8-2 typec-int Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250619-gs101-eint-mask-v1-2-89438cfd7499@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-06-25pinctrl: samsung: rename exynosautov920_retention_data to no_retention_dataPeter Griffin1-2/+4
To avoid having an exact copy of this struct for gs101 rename it and use it for both SoCs for eint banks. The purpose of this for exynosautov920 and gs101 is to obtain the PMU syscon for writing the calculated WAKEUP_MASK register(s). Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250619-gs101-eint-mask-v1-1-89438cfd7499@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-05-14Merge tag 'samsung-pinctrl-6.16' of ↵Linus Walleij5-151/+252
https://git.kernel.org/pub/scm/linux/kernel/git/pinctrl/samsung into devel Samsung pinctrl drivers changes for v6.16 Refactor the driver suspend and resume to handle Google GS101 EINT GPIO pin banks and add the alive pin bank for that SoC. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-29pinctrl: samsung: use new GPIO line value setter callbacksBartosz Golaszewski1-4/+9
struct gpio_chip now has callbacks for setting line values that return an integer, allowing to indicate failures. Convert the driver to using them. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Link: https://lore.kernel.org/20250424-gpiochip-set-rv-pinctrl-part2-v1-12-504f91120b99@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2025-04-08pinctrl: samsung: Add filter selection support for alive bank on gs101Peter Griffin2-0/+54
Newer Exynos based SoCs have a filter selection bitfield in the filter configuration registers on alive bank pins. This allows the selection of a digital or analog delay filter for each pin. Add support for selecting and enabling the filter. On suspend we set the analog filter to all pins in the bank (as the digital filter relies on a clock). On resume the digital filter is reapplied to all pins in the bank. The digital filter is working via a clock and has an adjustable filter delay flt_width bitfield, whereas the analog filter uses a fixed delay. The filter determines to what extent signal fluctuations received through the pad are considered glitches. The code path can be exercised using echo mem > /sys/power/state And then wake the device using a eint gpio Reviewed-by: André Draszik <andre.draszik@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250402-pinctrl-fltcon-suspend-v6-4-78ce0d4eb30c@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-04-08pinctrl: samsung: add gs101 specific eint suspend/resume callbacksPeter Griffin3-12/+85
gs101 differs to other SoCs in that fltcon1 register doesn't always exist. Additionally the offset of fltcon0 is not fixed and needs to use the newly added eint_fltcon_offset variable. Fixes: 4a8be01a1a7a ("pinctrl: samsung: Add gs101 SoC pinctrl configuration") Cc: stable@vger.kernel.org # depends on the previous three patches Reviewed-by: André Draszik <andre.draszik@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250402-pinctrl-fltcon-suspend-v6-3-78ce0d4eb30c@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-04-08pinctrl: samsung: add dedicated SoC eint suspend/resume callbacksPeter Griffin3-85/+97
Refactor the existing platform specific suspend/resume callback so that each SoC variant has it's own callback containing the SoC specific logic. This allows exynosautov920 to have a dedicated function for using eint_con_offset and eint_mask_offset. Also it is easily extendable for gs101 which will need dedicated logic for handling the varying register offset of fltcon0 via eint_fltcon_offset. Reviewed-by: André Draszik <andre.draszik@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250402-pinctrl-fltcon-suspend-v6-2-78ce0d4eb30c@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-04-08pinctrl: samsung: refactor drvdata suspend & resume callbacksPeter Griffin4-80/+42
This enables the clk_enable() and clk_disable() logic to be removed from each callback, but otherwise should have no functional impact. It is a prepatory patch so that the callbacks can become SoC specific. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250402-pinctrl-fltcon-suspend-v6-1-78ce0d4eb30c@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-03-11pinctrl: samsung: add support for eint_fltcon_offsetPeter Griffin4-49/+76
On gs101 SoC the fltcon0 (filter configuration 0) offset isn't at a fixed offset like previous SoCs as the fltcon1 register only exists when there are more than 4 pins in the bank. Add a eint_fltcon_offset and new GS101_PIN_BANK_EINT* macros that take an additional fltcon_offs variable. This can then be used in suspend/resume callbacks to save and restore the fltcon0 and fltcon1 registers. Fixes: 4a8be01a1a7a ("pinctrl: samsung: Add gs101 SoC pinctrl configuration") Cc: stable@vger.kernel.org Reviewed-by: André Draszik <andre.draszik@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20250307-pinctrl-fltcon-suspend-v4-1-2d775e486036@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-03-03pinctrl: samsung: add support for exynos7870 pinctrlKaustabh Chakraborty4-0/+161
Add support for the Exynos7870 SoC pin-controller in the pinctrl driver. It has 8 GPIO banks, and 3-bit PINCFG_TYPE_DRV width. Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Link: https://lore.kernel.org/r/20250301-exynos7870-pinctrl-v3-3-ba1da9d3cd2f@disroot.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-02-19pinctrl: samsung: add exynos2200 SoC pinctrl configurationIvaylo Ivanov3-0/+171
Add support for the pin-controller found on the Exynos2200 SoC used in Samsung Galaxy S22, S22 Plus and S22 Ultra phones. Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Link: https://lore.kernel.org/r/20250215113248.159386-4-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2025-01-15pinctrl: Use str_enable_disable-like helpersKrzysztof Kozlowski1-1/+2
Replace ternary (condition ? "enable" : "disable") syntax with helpers from string_choices.h because: 1. Simple function call with one argument is easier to read. Ternary operator has three arguments and with wrapping might lead to quite long code. 2. Is slightly shorter thus also easier to read. 3. It brings uniformity in the text - same string. 4. Allows deduping by the linker, which results in a smaller binary file. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com> Reviewed-by: Antonio Borneo <antonio.borneo@foss.st.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/20250114203602.1013275-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2024-12-02pinctrl: samsung: update child reference drop commentJavier Carrasco1-1/+1
Commit 954445c72fc7 ("pinctrl: samsung: Drop redundant node parameter in samsung_banks_of_node_get()") modified the name of the function used to release child nodes from samsung_drop_banks_of_node() to samsung_banks_node_put(). Update the comment to use the current function name. Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://lore.kernel.org/r/20241106-samsung-pinctrl-put-v1-2-de854e26dd03@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-02pinctrl: samsung: fix fwnode refcount cleanup if platform_get_irq_optional() ↵Javier Carrasco1-1/+1
fails Commit 50ebd19e3585 ("pinctrl: samsung: drop pin banks references on error paths") fixed the pin bank references on the error paths of the probe function, but there is still an error path where this is not done. If samsung_pinctrl_get_soc_data() does not fail, the child references will have acquired, and they will need to be released in the error path of platform_get_irq_optional(), as it is done in the following error paths within the probe function. Replace the direct return in the error path with a goto instruction to the cleanup function. Cc: stable@vger.kernel.org Fixes: a382d568f144 ("pinctrl: samsung: Use platform_get_irq_optional() to get the interrupt") Signed-off-by: Javier Carrasco <javier.carrasco.cruz@gmail.com> Link: https://lore.kernel.org/r/20241106-samsung-pinctrl-put-v1-1-de854e26dd03@gmail.com [krzysztof: change Fixes SHA to point to commit introducing the return leading to OF node leak] Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-12-02pinctrl: samsung: Fix irq handling if an error occurs in ↵Christophe JAILLET1-1/+2
exynos_irq_demux_eint16_31() chained_irq_enter(() should be paired with a corresponding chained_irq_exit(). Here, if clk_enable() fails, a early return occurs and chained_irq_exit() is not called. Add a new label and a goto for fix it. Fixes: f9c744747973 ("pinctrl: samsung: support a bus clock") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Reviewed-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/f148d823acfb3326a115bd49a0eed60f2345f909.1731844995.git.christophe.jaillet@wanadoo.fr Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-27pinctrl: samsung: Add Exynos9810 SoC specific dataMarkuss Broks3-0/+157
Add Samsung Exynos9810 SoC specific data to enable pinctrl support for platforms based on Exynos9810. Co-developed-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Maksym Holovach <nergzd@nergzd723.xyz> Signed-off-by: Markuss Broks <markuss.broks@gmail.com> Link: https://lore.kernel.org/r/20241026-exynos9810-v3-8-b89de9441ea8@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-17pinctrl: samsung: Add Exynos 990 SoC pinctrl configurationIgor Belwon3-0/+143
Add SoC pinctrl configuration for the Exynos 990. The bank types used are the same as Exynos 850, so we can reuse its macros. Signed-off-by: Igor Belwon <igor.belwon@mentallysanemainliners.org> Link: https://lore.kernel.org/r/20241016154838.64515-4-igor.belwon@mentallysanemainliners.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-10-02pinctrl: samsung: Add exynos8895 SoC pinctrl configurationIvaylo Ivanov4-0/+150
Add support for the pin-controller found on the Exynos8895 SoC used in Samsung Galaxy S8 and S8 Plus phones. It has a newly applied pinctrl register layer for FSYS0 with a different bank type offset that consists of the following bit fields: CON: 4, DAT: 1, PUD: 2, DRV: 3, CONPDN: 2, PUDPDN: 2 Signed-off-by: Ivaylo Ivanov <ivo.ivanov.ivanov1@gmail.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20240920154508.1618410-6-ivo.ivanov.ivanov1@gmail.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-08-23pinctrl: samsung: Use kmemdup_array instead of kmemdup for multiple allocationShen Lichuan1-2/+2
Let the kmemdup_array() take care about multiplication and possible overflows. Using kmemdup_array() is more appropriate and makes the code easier to audit. Signed-off-by: Shen Lichuan <shenlichuan@vivo.com> Link: https://lore.kernel.org/r/20240823114441.50648-1-shenlichuan@vivo.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-08-08pinctrl: samsung: Add support for pull-up and pull-downVishnu Reddy4-0/+126
Gpiolib framework has the implementation of setting up the PUD configuration for GPIO pins but there is no driver support. Add support to handle the PUD configuration request from the userspace in samsung pinctrl driver. Signed-off-by: Vishnu Reddy <vishnu.reddy@samsung.com> Link: https://lore.kernel.org/r/20240729153631.24536-1-vishnu.reddy@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-08-05pinctrl: samsung: Use scope based of_node_put() cleanupsPeng Fan2-26/+9
Use scope based of_node_put() cleanup to simplify code. Signed-off-by: Peng Fan <peng.fan@nxp.com> Link: https://lore.kernel.org/r/20240504-pinctrl-cleanup-v2-20-26c5f2dc1181@nxp.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-08-04pinctrl: samsung: Use of_property_present()Rob Herring (Arm)1-4/+4
Use of_property_present() to test for property presence rather than of_find_property(). This is part of a larger effort to remove callers of of_find_property() and similar functions. of_find_property() leaks the DT struct property and data pointers which is a problem for dynamically allocated nodes which may be freed. Signed-off-by: Rob Herring (Arm) <robh@kernel.org> Link: https://lore.kernel.org/r/20240731191312.1710417-16-robh@kernel.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-04-30pinctrl: samsung: drop redundant drvdata assignmentKrzysztof Kozlowski1-2/+0
Fix W=1 warning: drivers/pinctrl/samsung/pinctrl-samsung.c: In function ‘samsung_gpio_set_direction’: drivers/pinctrl/samsung/pinctrl-samsung.c:633:42: warning: variable ‘drvdata’ set but not used [-Wunused-but-set-variable] Fixes: f9c744747973 ("pinctrl: samsung: support a bus clock") Reported-by: kernel test robot <lkp@intel.com> Closes: https://lore.kernel.org/oe-kbuild-all/202404300825.6lxLwvUY-lkp@intel.com/ Reviewed-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20240430060304.12332-1-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2024-04-29pinctrl: samsung: support a bus clockAndré Draszik3-4/+207
On some Samsung-based SoCs there are separate bus clocks / gates each for each pinctrl instance. To be able to access each pinctrl instance's registers, this bus clock needs to be running, otherwise register access will hang. Google Tensor gs101 is one example for such an implementation. Update the driver to handle this optional bus clock: * handle an optional bus clock from DT * prepare it during driver probe * enclose all relevant register accesses with a clock enable & disable Signed-off-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20240426-samsung-pinctrl-busclock-v3-2-adb8664b8a7e@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-29pinctrl: samsung: constify iomem pointersKrzysztof Kozlowski2-4/+4
Constify few pointers to iomem, where the destination memory is not modified, for code safety and readability. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20231223191902.22857-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-12-13pinctrl: samsung: add exynosautov920 pinctrlJaewon Kim5-1/+190
Add pinctrl data for ExynosAutov920 SoC. It has a newly applied pinctrl register layer for ExynosAuto series. Pinctrl data for ExynosAutoV920 SoC. - GPA0,GPA1 (10): External wake up interrupt - GPQ0 (2): SPMI (PMIC I/F) - GPB0,GPB1,GPB2,GPB3,GPB4,GPB5,GPB6 (47): I2S Audio - GPH0,GPH1,GPH2,GPH3,GPH4,GPH5,GPH6,GPH8 (49): PCIE, UFS, Ethernet - GPG0,GPG1,GPG2,GPG3,GPG4,GPG5 (29): General purpose - GPP0,GPP1,GPP2,GPP3,GPP4,GPP5,GPP6,GPP7,GPP8,GPP9,GPP10 (77): USI Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com> Link: https://lore.kernel.org/r/20231211114145.106255-3-jaewon02.kim@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-13pinctrl: samsung: support ExynosAuto GPIO structureJaewon Kim3-8/+79
New ExynosAuto series GPIO have a different register structure. In the existing Exynos series, EINT control register is enumerated after a specific offset (e.g EXYNOS_GPIO_ECON_OFFSET, EXYNOS_GPIO_EMASK_OFFSET). However, from ExynosAutov920 SoC, the register that controls EINT belongs to each GPIO bank, and each GPIO bank has 0x1000 align. This is a structure to protect the GPIO bank using S2MPU in VM environment, and will only be applied in ExynosAuto series SoCs. -------------------------------------------------------------- | Original Exynos | ExynosAuto | |------------------------------------------------------------| | 0x0 GPIO_CON | 0x0 GPIO_CON | | 0x4 GPIO_DAT | 0x4 GPIO_DAT | | 0x8 GPIO_PUD | 0x8 GPIO_PUD | | 0xc GPIO_DRV | 0xc GPIO_DRV | | 0x10 GPIO_CONPDN | 0x10 GPIO_CONPDN | | 0x14 GPIO_PUDPDN | 0x14 GPIO_PUDPDN | |----------------------------| 0x18 EINT_CON (per_bank) | | ... | 0x1c EINT_FLTCON0 (per_bank) | | ... | 0x20 EINT_FLTCON1 (per_bank) | | ... | 0x24 EINT_MASK (per_bank) | | ... | 0x28 EINT_PEND (per_bank) | |----------------------------|-------------------------------| | 0x700 EINT_CON (global) | ... | | 0x800 EINT_FLTCON (global) | ... | | 0x900 EINT_MASK (global) | ... | | 0xa00 EINT_FEND (global) | ... | -------------------------------------------------------------- Signed-off-by: Jaewon Kim <jaewon02.kim@samsung.com> Link: https://lore.kernel.org/r/20231211114145.106255-2-jaewon02.kim@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-12-12pinctrl: samsung: Add gs101 SoC pinctrl configurationPeter Griffin3-0/+143
Add support for the pin-controller found on the gs101 SoC used in Pixel 6 phones. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20231211162331.435900-10-peter.griffin@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-11-30pinctrl: samsung: add irq_set_affinity() for non wake up external gpio interruptYoungmin Nam1-0/+14
To support affinity setting for non wake up external gpio interrupt, add irq_set_affinity callback using irq number from pinctrl driver data. Before this patch, changing the irq affinity of gpio interrupt is not possible: # cat /proc/irq/418/smp_affinity 3ff # echo 00f > /proc/irq/418/smp_affinity # cat /proc/irq/418/smp_affinity 3ff # cat /proc/interrupts CPU0 CPU1 CPU2 CPU3 ... 418: 3631 0 0 0 ... With this patch applied, it's possible to change irq affinity of gpio interrupt: # cat /proc/irq/418/smp_affinity 3ff # echo 00f > /proc/irq/418/smp_affinity # cat /proc/irq/418/smp_affinity 00f # cat /proc/interrupts CPU0 CPU1 CPU2 CPU3 ... 418: 3893 201 181 188 ... Signed-off-by: Youngmin Nam <youngmin.nam@samsung.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Tested-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20231126094618.2545116-1-youngmin.nam@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-10-09pinctrl: samsung: do not offset pinctrl numberspacesMateusz Majewski2-13/+4
Past versions of this driver have manually calculated base values for both the pinctrl numberspace and the global GPIO numberspace, giving both the same values. This was necessary for the global GPIO numberspace, since its values need to be unique system-wide. However, it was not necessary for the pinctrl numberspace, since its values only need to be unique for a single instance of the pinctrl device. It was just convenient to use the same values for both spaces. Right now those calculations are only used for the pinctrl numberspace, since GPIO numberspace bases are selected by the GPIO subsystem. Therefore, those calculations are unnecessary. Signed-off-by: Mateusz Majewski <m.majewski2@samsung.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Tested-by: Sam Protsenko <semen.protsenko@linaro.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20231006125557.212681-5-m.majewski2@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-10-09pinctrl: samsung: choose GPIO numberspace base dynamicallyMateusz Majewski1-1/+1
Selecting it statically is deprecated and results in a warning while booting the system: gpio gpiochip0: Static allocation of GPIO base is deprecated, use dynamic allocation. Signed-off-by: Mateusz Majewski <m.majewski2@samsung.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Tested-by: Sam Protsenko <semen.protsenko@linaro.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20231006125557.212681-4-m.majewski2@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-10-09pinctrl: samsung: use add_pin_ranges method to add pinctrl rangesMateusz Majewski2-13/+20
This is preferable since we can read the base in the global GPIO numberspace from the chip instead of needing to select it ourselves. Past versions could not do this, since they needed to add all the ranges before enabling the pinctrl subsystem, which was done before registering the GPIO chip. However, right now we enable the pinctrl subsystem after registering the chip and so this became possible. Signed-off-by: Mateusz Majewski <m.majewski2@samsung.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Tested-by: Sam Protsenko <semen.protsenko@linaro.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20231006125557.212681-3-m.majewski2@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-10-09pinctrl: samsung: defer pinctrl_enableMateusz Majewski1-4/+8
dev_pinctrl_register function immediately enables the pinctrl subsystem, which is unpreferable in general, since drivers might be unable to handle calls immediately. Hence devm_pinctrl_register_and_init, which does not call pinctrl_enable, is preferred. In case of our driver using the old function does not seem to be problematic for now, but will become an issue when we postpone parts of pinctrl initialization in a future commit, and it is a good idea to move off a deprecated-ish function anyway. Signed-off-by: Mateusz Majewski <m.majewski2@samsung.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Tested-by: Sam Protsenko <semen.protsenko@linaro.org> Tested-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20231006125557.212681-2-m.majewski2@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-10-08pinctrl: samsung: Annotate struct exynos_muxed_weint_data with __counted_byKees Cook2-2/+2
Prepare for the coming implementation by GCC and Clang of the __counted_by attribute. Flexible array members annotated with __counted_by can have their accesses bounds-checked at run-time via CONFIG_UBSAN_BOUNDS (for array indexing) and CONFIG_FORTIFY_SOURCE (for strcpy/memcpy-family functions). As found with Coccinelle[1], add __counted_by for struct exynos_muxed_weint_data. Additionally, since the element count member must be set before accessing the annotated flexible array member, move its initialization earlier. Cc: Tomasz Figa <tomasz.figa@gmail.com> Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Cc: Sylwester Nawrocki <s.nawrocki@samsung.com> Cc: Alim Akhtar <alim.akhtar@samsung.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: "Gustavo A. R. Silva" <gustavoars@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-samsung-soc@vger.kernel.org Cc: linux-gpio@vger.kernel.org Cc: linux-hardening@vger.kernel.org Link: https://github.com/kees/kernel-tools/blob/trunk/coccinelle/examples/counted_by.cocci [1] Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Link: https://lore.kernel.org/r/20231006201707.work.405-kees@kernel.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-07-20pinctrl: Explicitly include correct DT includesRob Herring1-1/+1
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Damien Le Moal <dlemoal@kernel.org> Acked-by: Emil Renner Berthing <emil.renner.berthing@canonical.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230714174901.4062397-1-robh@kernel.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-02-22Merge tag 'pinctrl-v6.3-1' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl Pull pin control updates from Linus Walleij: "Nothing special, notably a lot of new Qualcomm hardware is supported, a RISC-V reference SoC and then some cleanups both in code and device tree bindings. Core changes: - Add PINCTRL_PINFUNCTION() macro and use it in several drivers New drivers: - New driver for the StarFive JH7110 SoC "sys" and "aon" (always-on) pin controllers. (RISC-V.) - New subdriver for the Qualcomm QDU1000/QRU1000 SoC pin controller - New subdrivers for the Qualcomm SM8550 SoC and LPASS pin controllers - New subdriver for the Qualcomm SA8775P SoC pin controller - New subdriver for the Qualcomm IPQ5332 SoC pin controller - New (trivial) support for Qualcomm PM8550 and PMR735D PMIC pin control - New subdriver for the Mediatek MT7981 SoC pin controller Improvements: - Several cleanups and refactorings to the Intel drivers - Add 4KOhm bias support to the Intel driver - Use the NOIRQ_SYSTEM_SLEEP_PM_OPS for the AT91 driver - Support general purpose clocks in the Qualcomm MSM8226 SoC - Several conversions to use the new I2C .probe_new() call - Massive clean-up of the Qualcomm Device Tree YAML schemas - Add VIN[45] pins, groups and functions to the Renesas r8a77950 SoC driver" * tag 'pinctrl-v6.3-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (118 commits) pinctrl: qcom: Add support for i2c specific pull feature pinctrl: starfive: Add StarFive JH7110 aon controller driver pinctrl: starfive: Add StarFive JH7110 sys controller driver dt-bindings: pinctrl: Add StarFive JH7110 aon pinctrl dt-bindings: pinctrl: Add StarFive JH7110 sys pinctrl pinctrl: add mt7981 pinctrl driver dt-bindings: pinctrl: add bindings for MT7981 SoC dt-bindings: pinctrl: rockchip,pinctrl: mark gpio sub nodes of pinctrl as deprecated pinctrl: qcom: Introduce IPQ5332 TLMM driver dt-bindings: pinctrl: qcom: add IPQ5332 pinctrl dt-bindings: pinctrl: qcom: lpass-lpi: correct GPIO name pattern pinctrl: qcom: pinctrl-sm8550-lpass-lpi: add SM8550 LPASS dt-bindings: pinctrl: qcom,sm8550-lpass-lpi-pinctrl: add SM8550 LPASS pinctrl: at91: use devm_kasprintf() to avoid potential leaks dt-bindings: pinctrl: qcom: correct gpio-ranges in examples dt-bindings: pinctrl: qcom,msm8994: correct number of GPIOs dt-bindings: pinctrl: qcom,sdx55: correct GPIO name pattern dt-bindings: pinctrl: qcom,msm8953: correct GPIO name pattern dt-bindings: pinctrl: qcom,sm6375: correct GPIO name pattern and example dt-bindings: pinctrl: qcom,msm8909: correct GPIO name pattern and example ...
2023-01-16pinctrl: samsung: Do not mention legacy API in the codeAndy Shevchenko1-1/+1
Replace mentioning of legacy API by the latest one. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230112134849.59534-1-andriy.shevchenko@linux.intel.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-01-16pinctrl: remove s3c24xx driverArnd Bergmann3-659/+0
The s3c24xx platform was removed, so this driver has no remaining users. Acked-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2023-01-16ARM: s3c: remove s3c24xx specific hacksArnd Bergmann1-10/+0
A number of device drivers reference CONFIG_ARM_S3C24XX_CPUFREQ or similar symbols that are no longer available with the platform gone, though the drivers themselves are still used on newer platforms, so remove these hacks. Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Miquel Raynal <miquel.raynal@bootlin.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2022-10-24pinctrl: samsung: Add missing header(s)Andy Shevchenko1-5/+6
Do not imply that some of the generic headers may be always included. Instead, include explicitly what we are direct user of. While at it, sort headers alphabetically. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-08-16pinctrl: samsung: Finish initializing the gpios before registering themSaravana Kannan1-4/+4
As soon as a gpio is registered, it should be usable by a consumer. So, do all the initialization before registering the gpios. Without this change, a consumer can request a GPIO IRQ and have the gpio to IRQ mapping fail. Signed-off-by: Saravana Kannan <saravanak@google.com> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Tested-by: Chanho Park <chanho61.park@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220727013349.3056826-1-saravanak@google.com
2022-06-28pinctrl: samsung: do not use bindings header with constantsKrzysztof Kozlowski4-7/+14
The Samsung SoC pin controller driver uses only three defines from the bindings header with pin configuration register values, which proves the point that this header is not a proper bindings-type abstraction layer with IDs. Define the needed register values directly in the driver and stop using the bindings header. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220605160508.134075-8-krzysztof.kozlowski@linaro.org Link: https://lore.kernel.org/r/20220624081022.32384-1-krzysztof.kozlowski@linaro.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2022-05-27Merge tag 'gpio-updates-for-v5.19' of ↵Linus Torvalds5-24/+22
git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull gpio updates from Bartosz Golaszewski: "We have lots of small changes all over the place, but no huge reworks or new drivers: - use ioread()/iowrite() interfaces instead of raw inb()/outb() in drivers - make irqchips immutable due to the new warning popping up when drivers try to modify the irqchip structures - add new compatibles to dt-bindings for realtek-otto, renesas-rcar and pca95xx - add support for new models to gpio-rcar, gpio-pca953x & gpio-realtek-otto - allow parsing of GPIO hogs represented as children nodes of gpio-uniphier - define a set of common GPIO consumer strings in dt-bindings - shrink code in gpio-ml-ioh by using more devres interfaces - pass arguments to devm_kcalloc() in correct order in gpio-sim - add new helpers for iterating over GPIO firmware nodes and descriptors to gpiolib core and use it in several drivers - drop unused syscon_regmap_lookup_by_compatible() function - correct format specifiers and signedness of variables in GPIO ACPI - drop unneeded error checks in gpio-ftgpio - stop using the deprecated of_gpio.h header in gpio-zevio - drop platform_data support in gpio-max732x - simplify Kconfig dependencies in gpio-vf610 - use raw spinlocks where needed to make PREEMPT_RT happy - fix return values in board files using gpio-pcf857x - convert more drivers to using fwnode instead of of_node - minor fixes and improvements in gpiolib core" * tag 'gpio-updates-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: (55 commits) gpio: sifive: Make the irqchip immutable gpio: rcar: Make the irqchip immutable gpio: pcf857x: Make the irqchip immutable gpio: pca953x: Make the irqchip immutable gpio: dwapb: Make the irqchip immutable gpio: sim: Use correct order for the parameters of devm_kcalloc() gpio: ml-ioh: Convert to use managed functions pcim* and devm_* gpio: ftgpio: Remove unneeded ERROR check before clk_disable_unprepare gpio: ws16c48: Utilize iomap interface gpio: gpio-mm: Utilize iomap interface gpio: 104-idio-16: Utilize iomap interface gpio: 104-idi-48: Utilize iomap interface gpio: 104-dio-48e: Utilize iomap interface gpio: zevio: drop of_gpio.h header gpio: max77620: Make the irqchip immutable dt-bindings: gpio: pca95xx: add entry for pca6408 gpio: pca953xx: Add support for pca6408 gpio: max732x: Drop unused support for irq and setup code via platform data gpio: vf610: drop the SOC_VF610 dependency for GPIO_VF610 gpio: syscon: Remove usage of syscon_regmap_lookup_by_compatible ...
2022-04-21pinctrl: samsung: fix missing GPIOLIB on ARM64 Exynos configKrzysztof Kozlowski1-7/+4
The Samsung pinctrl drivers depend on OF_GPIO, which is part of GPIOLIB. ARMv7 Exynos platform selects GPIOLIB and Samsung pinctrl drivers. ARMv8 Exynos selects only the latter leading to possible wrong configuration on ARMv8 build: WARNING: unmet direct dependencies detected for PINCTRL_EXYNOS Depends on [n]: PINCTRL [=y] && OF_GPIO [=n] && (ARCH_EXYNOS [=y] || ARCH_S5PV210 || COMPILE_TEST [=y]) Selected by [y]: - ARCH_EXYNOS [=y] Always select the GPIOLIB from the Samsung pinctrl drivers to fix the issue. This requires removing of OF_GPIO dependency (to avoid recursive dependency), so add dependency on OF for COMPILE_TEST cases. Reported-by: Necip Fazil Yildiran <fazilyildiran@gmail.com> Fixes: eed6b3eb20b9 ("arm64: Split out platform options to separate Kconfig") Cc: <stable@vger.kernel.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20220420141407.470955-1-krzysztof.kozlowski@linaro.org
2022-04-14pinctrl: samsung: Switch to use for_each_gpiochip_node() helperAndy Shevchenko5-18/+18
Switch the code to use for_each_gpiochip_node() helper. While at it, in order to avoid additional churn in the future, switch to fwnode APIs where it makes sense. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-04-14pinctrl: samsung: Drop redundant node parameter in samsung_banks_of_node_get()Andy Shevchenko1-7/+5
The node is taken from the device pointer, which is supplied as a parameter, hence no need to have a separate parameter for node. Drop redundant node parameter in samsung_banks_of_node_get(). While at it, drop "of_" part in the samsung_banks_of_node_get() and samsung_banks_of_node_put() function names to avoid additional churn in the next changes. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Tested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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