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path: root/drivers/phy/socionext/phy-uniphier-pcie.c
AgeCommit message (Expand)AuthorFilesLines
2023-07-17phy: Explicitly include correct DT includesRob Herring1-1/+1
2021-11-23phy: uniphier-pcie: Add dual-phy support for NX1 SoCKunihiko Hayashi1-14/+34
2021-11-23phy: uniphier-pcie: Set VCOPLL clamp mode in PHY registerKunihiko Hayashi1-0/+5
2021-11-23phy: uniphier-pcie: Add compatible string and SoC-dependent data for NX1 SoCKunihiko Hayashi1-0/+19
2021-06-21phy: uniphier-pcie: Fix updating phy parametersKunihiko Hayashi1-4/+7
2020-03-20phy: uniphier-pcie: Add SoC-dependent phy-mode function supportKunihiko Hayashi1-7/+10
2020-03-20phy: uniphier-pcie: Add legacy SoC support for Pro5Kunihiko Hayashi1-11/+72
2020-03-20phy: socionext: Use devm_platform_ioremap_resource()Kunihiko Hayashi1-3/+1
2018-09-25phy: socionext: add PCIe PHY driver supportKunihiko Hayashi1-0/+240