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path: root/drivers/net/ethernet/mellanox/mlxsw/reg.h
AgeCommit message (Expand)AuthorFilesLines
2017-06-14mlxsw: reg: Add MCIA register for cable info accessArkadi Sharshevsky1-0/+76
2017-06-05mlxsw: Fix typo inside enumerationIdo Schimmel1-1/+1
2017-05-26mlxsw: reg: Add Management Component Data Access registerYotam Gigi1-0/+52
2017-05-26mlxsw: reg: Add Management Component Control registerYotam Gigi1-0/+83
2017-05-26mlxsw: reg: Add Management Component Query Information registerYotam Gigi1-0/+84
2017-03-29mlxsw: reg: Add Router Interface Counter RegisterArkadi Sharshevsky1-0/+124
2017-03-29mlxsw: reg: Add counter fields to RITR registerArkadi Sharshevsky1-0/+54
2017-03-15Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller1-2/+2
2017-03-14mlxsw: reg: Fix SPVMLR max record countJiri Pirko1-1/+1
2017-03-14mlxsw: reg: Fix SPVM max record countJiri Pirko1-1/+1
2017-03-13mlxsw: reg: Add Monitoring General Purpose Counter Set registerArkadi Sharshevsky1-0/+65
2017-03-10mlxsw: spectrum_router: Explicitly Associate RIFs with VRsIdo Schimmel1-1/+3
2017-02-06mlxsw: reg: Fix HTGT register lengthElad Raz1-1/+1
2017-02-04mlxsw: reg: Add Policy-Engine Extended Flexible Action RegisterJiri Pirko1-3/+36
2017-02-04mlxsw: reg: Add Policy-Engine Policy Based Switching RegisterJiri Pirko1-0/+31
2017-02-04mlxsw: reg: Add Policy-Engine Rules Copy RegisterJiri Pirko1-0/+77
2017-02-04mlxsw: reg: Add Policy-Engine Port Binding TableJiri Pirko1-0/+63
2017-02-04mlxsw: reg: Add Policy-Engine TCAM Entry Register Version 2Jiri Pirko1-0/+100
2017-02-04mlxsw: reg: Add Policy-Engine TCAM Allocation RegisterJiri Pirko1-0/+106
2017-02-04mlxsw: reg: Add Policy-Engine ACL Group Table registerJiri Pirko1-0/+54
2017-02-04mlxsw: reg: Add Policy-Engine ACL RegisterJiri Pirko1-2/+45
2017-01-24mlxsw: reg: add the Monitoring Packet Sampling Configuration RegisterYotam Gigi1-0/+41
2016-11-26mlxsw: reg: Add QoS Policer Configuration RegisterNogah Frankel1-0/+141
2016-11-26mlxsw: Create a different trap group list for each deviceNogah Frankel1-2/+15
2016-11-26mlxsw: Change trap groups settingNogah Frankel1-27/+26
2016-11-26mlxsw: Change trap set functionNogah Frankel1-13/+7
2016-11-22mlxsw: reg: Add Management Fan Speed Limit registerJiri Pirko1-0/+49
2016-11-13mlxsw: reg: Fix pwm_frequency field size in MFCR registerJiri Pirko1-1/+1
2016-10-30mlxsw: reg: Add local-port to Infiniband port mappingElad Raz1-0/+22
2016-10-30mlxsw: reg: Add Infiniband support to PTYSElad Raz1-0/+71
2016-10-30mlxsw: reg: Add eth prefix to PTYS pack and unpackElad Raz1-5/+6
2016-10-24mlxsw: reg: Generare register names automaticallyJiri Pirko1-123/+73
2016-10-24mlxsw: reg: Use helper macro to define registersJiri Pirko1-240/+66
2016-09-20mlxsw: Change the RX LAG hash function from XOR to CRCElad Raz1-1/+1
2016-09-13mlxsw: spectrum: Add support for new ethtool APIIdo Schimmel1-0/+1
2016-09-13mlxsw: spectrum: Report link partner's advertised speedsIdo Schimmel1-0/+19
2016-08-24mlxsw: spectrum: Limit number of FDB records per learning sessionIdo Schimmel1-0/+7
2016-08-18mlxsw: reg: Fix missing op field fill-upJiri Pirko1-0/+1
2016-08-18mlxsw: spectrum: Trap loop-backed packetsIdo Schimmel1-0/+10
2016-07-25mlxsw: reg: Add the Monitoring Port Analyzer registerYotam Gigi1-0/+67
2016-07-25mlxsw: reg: Add Monitoring Port Analyzer Table registerYotam Gigi1-0/+54
2016-07-25mlxsw: reg: Add Shared Buffer Internal Buffer registerYotam Gigi1-0/+41
2016-07-24Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller1-1/+16
2016-07-21mlxsw: spectrum: Expose per-tc counters via ethtoolIdo Schimmel1-0/+18
2016-07-16mlxsw: spectrum: Prevent invalid ingress buffer mappingIdo Schimmel1-1/+16
2016-07-05mlxsw: reg: Add Router Algorithmic LPM ECMP Update RegisterJiri Pirko1-0/+69
2016-07-05mlxsw: reg: Add Router Adjacency Table registerYotam Gigi1-0/+133
2016-07-05mlxsw: reg: Add Router Algorithmic LPM Unicast Host Table Dump registerYotam Gigi1-0/+147
2016-07-05mlxsw: reg: Add Router Algorithmic LPM Unicast Host Table registerYotam Gigi1-0/+141
2016-07-05mlxsw: reg: Add Router Algorithmic LPM Unicast Entry Register definitionJiri Pirko1-0/+264
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