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path: root/drivers/infiniband/hw/hns
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2021-07-14RDMA/hns: Fix uninitialized variableYixing Liu1-1/+1
2021-07-14RDMA/hns: Force rewrite inline flag of WQELang Cheng1-2/+2
2021-07-14RDMA/hns: Remove the condition of light load for posting DWQEYixian Liu1-2/+1
2021-05-14RDMA/hns: Fix missing assignment of max_inline_dataWeihang Li1-0/+1
2021-03-22RDMA/hns: Fix bug during CMDQ initializationLang Cheng1-1/+3
2021-02-18Merge tag 'v5.11' into rdma.git for-nextJason Gunthorpe2-6/+7
2021-02-16RDMA/hns: Adjust definition of FRMR fieldsYixing Liu3-26/+34
2021-02-16RDMA/hns: Refactor process of posting CMDQLang Cheng1-25/+17
2021-02-16RDMA/hns: Adjust fields and variables about CMDQ tail/headLang Cheng3-23/+21
2021-02-16RDMA/hns: Remove redundant operations on CMDQLang Cheng2-50/+5
2021-02-16RDMA/hns: Fixes missing error code of CMDQLang Cheng1-4/+3
2021-02-16RDMA/hns: Remove unused member and variable of CMDQLang Cheng2-7/+3
2021-02-09RDMA/hns: Delete redundant judgment when preparing descriptorsXinhao Liu1-26/+14
2021-02-09RDMA/hns: Remove unnecessary wrap around for EQ's consumer indexYixian Liu1-6/+0
2021-02-09RDMA/hns: Avoid unnecessary memset on WQEs in post_sendLang Cheng1-2/+0
2021-02-09RDMA/hns: Remove some magic numbersXinhao Liu1-5/+11
2021-02-09RDMA/hns: Move HIP06 related definitions into hns_roce_hw_v1.hLang Cheng2-41/+43
2021-02-09RDMA/hns: Replace wmb&__raw_writeq with writeqLang Cheng3-35/+2
2021-02-09RDMA/hns: Skip qp_flow_control_init() for HIP09Yixing Liu1-0/+3
2021-02-09RDMA/hns: Disable RQ inline by defaultLijun Ou1-1/+0
2021-02-09RDMA/hns: Add mapped page count checking for MTRXi Wang2-25/+40
2021-02-09RDMA/hns: Fix type of sq_signal_bitsWeihang Li1-1/+1
2021-02-09RDMA/hns: Avoid filling sgid index when modifying QP to RTRWeihang Li3-27/+16
2021-02-09RDMA/hns: Add support of direct wqeYixing Liu3-1/+62
2021-02-09RDMA/hns: Add verification of QP type when post_recvWenpeng Liang1-1/+13
2021-02-09RDMA/hns: Refactor hns_roce_v2_post_srq_recv()Wenpeng Liang1-26/+43
2021-02-09RDMA/hns: Clear remaining unused sges when post_recvXi Wang1-52/+47
2021-02-09RDMA/hns: Refactor post recv flowXi Wang1-40/+41
2021-02-09RDMA/hns: Use new interfaces to write SRQCLang Cheng2-111/+118
2021-02-09RDMA/hns: Refactor code about SRQ ContextWenpeng Liang3-41/+42
2021-02-09RDMA/hns: Refactor hns_roce_create_srq()Wenpeng Liang3-125/+161
2021-02-09RDMA/hns: Remove the reserved WQE of SRQWenpeng Liang3-5/+8
2021-02-09RDMA/hns: Fixed wrong judgments in the goto branchWenpeng Liang1-2/+1
2021-02-09RDMA/hns: Force srq_limit to 0 when creating SRQWenpeng Liang1-0/+1
2021-02-09RDMA/hns: Bugfix for checking whether the srq is full when post wrWenpeng Liang3-9/+19
2021-02-09RDMA/hns: Allocate one more recv SGE for HIP08Lang Cheng5-19/+93
2021-01-28RDMA/hns: Use new interface to set MPT related fieldsLang Cheng3-30/+85
2021-01-28RDMA/hns: Optimize the MR registration processLang Cheng3-89/+47
2021-01-28RDMA/hns: Refactor the MTR creation flowXi Wang6-172/+125
2021-01-22RDMA/hw/hns/hns_roce_mr: Add missing description for 'hr_dev' paramLee Jones1-0/+1
2021-01-22RDMA/hw/hns/hns_roce_hw_v1: Fix doc-rot issue relating to 'rereset'Lee Jones1-1/+1
2021-01-20RDMA/hns: Use mutex instead of spinlock for ida allocationYangyang Li2-6/+7
2021-01-18RDMA/hns: Create CQ with selected CQN for bank load balanceYangyang Li3-28/+105
2021-01-07RDMA/hns: remove h from printk format specifierTom Rix1-1/+1
2020-12-11RDMA/hns: Simplify AEQE process for different types of queueYixian Liu3-62/+23
2020-12-11RDMA/hns: Fix inaccurate printsYixing Liu8-90/+107
2020-12-11RDMA/hns: Fix incorrect symbol typesWenpeng Liang10-73/+73
2020-12-11RDMA/hns: Clear redundant variable initializationXinhao Liu2-5/+5
2020-12-11RDMA/hns: Fix coding style issuesLang Cheng13-51/+43
2020-12-11RDMA/hns: Remove unnecessary access right set during INIT2INITYixian Liu1-46/+0
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