summaryrefslogtreecommitdiff
path: root/drivers/gpu
AgeCommit message (Expand)AuthorFilesLines
2025-01-23drm/i915/gt: fix typos in i915/gt files.Nitin Gote28-38/+38
2025-01-23drm/i915/cx0_phy: Use HDMI PLL algorithm for C10 PHYAnkit Nautiyal3-49/+11
2025-01-23drm/i915/intel_snps_hdmi_pll: Compute C10 HDMI PLLs with algorithmAnkit Nautiyal2-0/+78
2025-01-23drm/i915/cx0_phy_regs: Add C10 registers bitsAnkit Nautiyal1-0/+24
2025-01-23drm/i915/snps_phy: Use HDMI PLL algorithm for DG2Ankit Nautiyal3-31/+9
2025-01-23drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2Ankit Nautiyal4-0/+305
2025-01-22drm/i915/dp_mst: Use intel_display::platform.alderlake_p instead of IS_ALDERL...Imre Deak1-2/+1
2025-01-22drm/i915/dp_mst: Simplify getting a drm_device pointer needed by to_i915()Imre Deak1-3/+3
2025-01-22drm/i915/dp_mst: Simplify using to_intel_display() passing it an intel_connec...Imre Deak1-3/+3
2025-01-22drm/i915/dp_mst: Use intel_connector vs. drm_connector pointer in intel_dp_mst.cImre Deak1-92/+88
2025-01-22drm/i915/dp_mst: Fix error handling while adding a connectorImre Deak1-8/+9
2025-01-22drm/i915/dp: Correct max compressed bpp bounds by using link bppAnkit Nautiyal1-2/+4
2025-01-22drm/i915/backlight: Return immediately when scale() finds invalid parametersGuenter Roeck1-2/+3
2025-01-21drm/i915/dsb: Allow DSB to perform commits when VRR is enabledVille Syrjälä1-1/+0
2025-01-21drm/i915/dsb: Add support for triggering VRR push with DSBVille Syrjälä1-0/+10
2025-01-21drm/i915: Allow fastboot to fix up the vblank delayVille Syrjälä1-4/+22
2025-01-21drm/i915: Extract lrr_params_changed()Ville Syrjälä1-2/+9
2025-01-21drm/i915: Warn if someone tries to use intel_set_transcoder_timings*() on DSI...Ville Syrjälä1-0/+4
2025-01-21drm/i915: Update TRANS_SET_CONTEXT_LATENCY during LRR updatesVille Syrjälä1-0/+4
2025-01-21drm/i915: Handle interlaced modes in intel_set_transcoder_timings_lrr()Ville Syrjälä1-2/+6
2025-01-21drm/i915: Keep TRANS_VBLANK.vblank_start==0 on ADL+ even when doing LRR updatesVille Syrjälä1-0/+8
2025-01-21drm/xe/dp: Fix non-display builds with DP tunnelling incorrectly enabledImre Deak1-1/+1
2025-01-21drm/xe: Remove double pageflipMaarten Lankhorst1-10/+0
2025-01-21drm/i915/psr: Allow changing Panel Replay mode without full modesetJouni Högander2-22/+17
2025-01-21drm/i915/psr: Make intel_psr_enable_sink as local static functionJouni Högander2-4/+2
2025-01-21drm/i915/psr: Enable Panel Replay on sink always when it's supportedJouni Högander1-2/+1
2025-01-21drm/i915/psr: Add new function for writing sink panel replay enable bitJouni Högander2-0/+8
2025-01-21drm/xe/display: Re-use display vmas when possibleMaarten Lankhorst8-9/+65
2025-01-21drm/i915/hdcp: Use correct function to check if encoder is HDMISuraj Kandpal1-1/+1
2025-01-20drm/i915: Carve up skl_get_plane_caps()Ville Syrjälä1-24/+57
2025-01-20drm/i915: Relocate xe AUX hackVille Syrjälä1-5/+10
2025-01-20drm/i915: Nuke ADL pre-production Wa_22011186057Ville Syrjälä1-8/+0
2025-01-20drm/i915: Disable scanout VT-d workaround for TGL+Ville Syrjälä1-1/+1
2025-01-20drm/i915: Reuse vlv_primary_min_alignment() for sprites as wellVille Syrjälä3-20/+9
2025-01-20drm/i915: Use plane->can_async_flip() for alignment exceptionsVille Syrjälä2-39/+37
2025-01-20drm/i915: Introduce plane->can_async_flip()Ville Syrjälä6-52/+97
2025-01-20drm/i915: Allow async flips with compression on ICLVille Syrjälä1-1/+20
2025-01-20drm/i915: Allow async flips with render compression on TGL+Ville Syrjälä3-8/+26
2025-01-17drm/i915/dmc_wl: Track pipe interrupt registersGustavo Sousa1-0/+1
2025-01-17drm/i915/display: Wrap IRQ-specific uncore functionsGustavo Sousa1-45/+83
2025-01-17drm/i915/display: Use display MMIO functions in intel_display_irq.cGustavo Sousa1-101/+121
2025-01-17drm/i915/dsc: Remove old comment about DSC 444 supportAnkit Nautiyal1-1/+0
2025-01-17drm/i915/dsc: Use helper to calculate range_bpg_offsetAnkit Nautiyal1-29/+30
2025-01-17drm/i915/hdcp: Fix Repeater authentication during topology changeSuraj Kandpal1-0/+13
2025-01-17drm/i915/cx0_phy: Update HDMI TMDS C20 algorithm valueDnyaneshwar Bhadane3-8/+57
2025-01-17drm/i915/display: Add MTL subplatforms definitionDnyaneshwar Bhadane2-0/+14
2025-01-16drm/xe/dp: Enable DP tunnelingImre Deak3-2/+20
2025-01-15drm/i915/vrr: Plumb the DSB into intel_vrr_send_push()Ville Syrjälä3-5/+15
2025-01-15drm/i915/vrr: Add extra vblank delay to estimatesVille Syrjälä1-6/+27
2025-01-15drm/i915/vrr: Fix vmin/vmax/flipline on TGL when using vblank delayVille Syrjälä1-6/+26
generated by cgit v1.2.3 (git 2.39.0) at 2026-06-20 13:20:15 +0300