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path: root/drivers/gpu/drm/msm
AgeCommit message (Expand)AuthorFilesLines
37 hoursdrm/msm: Fix dma_free_attrs() buffer sizeThomas Fourier1-1/+1
37 hoursdrm/msm/dsi: fix pclk rate calculation for bonded dsiPengyu Luo1-6/+23
37 hoursdrm/msm/dsi: fix hdisplay calculation when programming dsi registersPengyu Luo1-6/+8
2026-03-04drm/msm/a2xx: fix pixel shader start on A225Dmitry Baryshkov1-1/+4
2026-03-04drm/msm/dpu: fix CMD panels on DPU 1.x - 3.xDmitry Baryshkov1-3/+4
2026-03-04drm/msm/disp: set num_planes to 1 for interleaved YUV formatsDmitry Baryshkov1-4/+4
2026-03-04drm/msm/dpu: fix WD timer handling on DPU 8.xDmitry Baryshkov5-13/+57
2026-03-04drm/msm/dpu: Set vsync source irrespective of mdp top supportTeguh Sobirin1-8/+8
2026-03-04drm/msm/disp/dpu: add merge3d support for sc7280Mahadevan P1-2/+12
2026-02-06drm/msm/a6xx: fix bogus hwcg register updatesJohan Hovold1-2/+0
2026-01-08drm/msm/dpu: Add missing NULL pointer check for pingpong interfaceNikolay Kuratov1-6/+4
2026-01-08drm/msm/a6xx: Fix out of bound IO access in a6xx_get_gmu_registersAkhil P Oommen1-1/+1
2025-12-18drm/msm/a6xx: Improve MX rail fallback in RPMH vote initAkhil P Oommen1-11/+15
2025-12-18drm/msm/a6xx: Fix the gemnoc workaroundAkhil P Oommen1-4/+4
2025-12-18drm/msm/a6xx: Flush LRZ cache before PT switchAkhil P Oommen1-2/+8
2025-12-18drm/msm/a2xx: stop over-complaining about the legacy firmwareDmitry Baryshkov1-1/+1
2025-12-18drm/msm/dpu: drop dpu_hw_dsc_destroy() prototypeDmitry Baryshkov1-6/+0
2025-11-13drm/msm/registers: Generate _HI/LO builders for reg64Rob Clark1-0/+7
2025-11-13drm/msm: make sure to not queue up recovery more than onceAntonino Maniscalco1-0/+3
2025-11-13drm/msm/dsi/phy_7nm: Fix missing initial VCO rateKrzysztof Kozlowski1-0/+6
2025-11-13drm/msm/dsi/phy: Toggle back buffer resync after preparing PLLKrzysztof Kozlowski1-0/+4
2025-11-13drm/msm/a6xx: Fix GMU firmware parserAkhil P Oommen1-1/+4
2025-10-23drm/msm/a6xx: Fix PDC sleep sequenceAkhil P Oommen2-11/+23
2025-10-15drm/msm/dpu: fix incorrect type for retQianfeng Rong1-1/+1
2025-09-04drm/msm: update the high bitfield of certain DSI registersAyushi Makhija1-14/+14
2025-09-04drm/msm/kms: move snapshot init earlier in KMS initDmitry Baryshkov1-4/+6
2025-09-04drm/msm: Defer fd_install in SUBMIT ioctlRob Clark1-7/+7
2025-08-20drm/msm: Add error handling for krealloc in metadata setupYuan Chen1-1/+8
2025-08-20drm/msm: use trylock for debugfsRob Clark2-1/+8
2025-08-15drm/msm/dpu: Fill in min_prefill_lines for SC8180XKonrad Dybcio1-0/+1
2025-07-10drm/msm: Fix another leak in the submit error pathRob Clark1-2/+6
2025-07-10drm/msm: Fix a fence leak in submit error pathRob Clark1-0/+9
2025-07-06drm/msm/dp: account for widebus and yuv420 during mode validationSasha Levin2-6/+10
2025-07-06drm/msm/gpu: Fix crash when throttling GPU immediately during bootStephan Gerhold1-0/+1
2025-06-27drm/msm/a7xx: Call CP_RESET_CONTEXT_STATEConnor Abbott1-0/+14
2025-06-27drm/msm: Fix CP_RESET_CONTEXT_STATE bitfield namesConnor Abbott1-1/+2
2025-06-27drm/msm/dsi/dsi_phy_10nm: Fix missing initial VCO rateKrzysztof Kozlowski1-0/+7
2025-06-27drm/msm/disp: Correct porch timing for SDM845James A. MacInnes1-5/+9
2025-06-19drm/msm/a6xx: Disable rgb565_predicator on Adreno 7c3Konrad Dybcio1-1/+0
2025-06-19drm/msm/dpu: enable SmartDMA on SC8180XDmitry Baryshkov1-8/+8
2025-06-19drm/msm/dpu: enable SmartDMA on SM8150Dmitry Baryshkov1-8/+8
2025-04-25drm/msm/a6xx: Fix stale rpmh votes from GPUAkhil P Oommen1-33/+39
2025-04-25drm/msm/dsi: Add check for devm_kstrdup()Haoxiang Li1-1/+8
2025-04-25drm/msm/a6xx+: Don't let IB_SIZE overflowRob Clark2-4/+11
2025-04-10drm/msm/a6xx: Fix a6xx indexed-regs in devcoreduumpRob Clark1-0/+2
2025-04-10drm/msm/dsi: Set PHY usescase (and mode) before registering DSI hostMarijn Suijten1-11/+21
2025-04-10drm/msm/dsi: Use existing per-interface slice count in DSC timingMarijn Suijten2-15/+4
2025-04-10drm/msm/dsi/phy: Program clock inverters in correct registerKrzysztof Kozlowski1-1/+1
2025-04-10drm/msm/dpu: don't use active in atomic_check()Dmitry Baryshkov2-6/+1
2025-02-27drm/msm/dpu: Disable dither in phys encoder cleanupJessica Zhang1-0/+3
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