Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2020-09-12 | drm/msm/dsi: add support for 7nm DSI PHY/PLL | Jonathan Marek | 1 | -0/+4 |
2019-06-05 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284 | Thomas Gleixner | 1 | -9/+1 |
2018-12-11 | drm: msm: Use DRM_DEV_* instead of dev_* | Mamta Shukla | 1 | -1/+1 |
2018-02-20 | drm/msm/dsi: Add skeleton 10nm PHY/PLL code | Archit Taneja | 1 | -0/+3 |
2018-02-20 | drm/msm/dsi: check for failure on retrieving pll in dsi manager | Lloyd Atkinson | 1 | -1/+1 |
2017-02-06 | drm/msm/dsi: Add PHY/PLL for 8x96 | Archit Taneja | 1 | -0/+12 |
2015-12-14 | drm/msm/dsi: Add DSI PLL for 28nm 8960 PHY | Archit Taneja | 1 | -0/+3 |
2015-08-16 | drm/msm/dsi: Save/Restore PLL status across PHY reset | Hai Li | 1 | -18/+24 |
2015-06-11 | drm/msm/dsi: Add DSI PLL clock driver support | Hai Li | 1 | -0/+164 |